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| author | Francis Rowe <info@gluglug.org.uk> | 2015-07-31 03:57:09 (EDT) |
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| committer | Francis Rowe <info@gluglug.org.uk> | 2015-07-31 03:57:09 (EDT) |
| commit | f57a1d73109b7089156968e0b5b05944a1bf4c6e (patch) | |
| tree | e7b9e8f55e3f66a4a96422794bf0e813d4aa51bd /site/faq | |
| parent | 006bb476dda1623495aad25d35f79e53de19f9fc (diff) | |
| download | libreboot.org-f57a1d73109b7089156968e0b5b05944a1bf4c6e.zip libreboot.org-f57a1d73109b7089156968e0b5b05944a1bf4c6e.tar.gz libreboot.org-f57a1d73109b7089156968e0b5b05944a1bf4c6e.tar.bz2 | |
typo
Diffstat (limited to 'site/faq')
| -rw-r--r-- | site/faq/index.php | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/site/faq/index.php b/site/faq/index.php index 49049ab..48fe580 100644 --- a/site/faq/index.php +++ b/site/faq/index.php @@ -157,10 +157,9 @@ <h3 id="fsp">Firmware Support Package (FSP) <span class="ref">(<a href="#fsp">#fsp</a>)</span></h3> <p> On all recent Intel systems, coreboot support has revolved around integrating a blob (for each system) called - the <i>FSP</i> (firmware support package), which handles most of the hardware initialization, including - memory initialization. At present, it is believed that this can be replaced, but it will require a lot - of work on reverse engineering which will likely take many years, even for the most skilled developer working full-time. - Intel distributes the FSP blob to firmware developers (including coreboot). + the <i>FSP</i> (firmware support package), which handles all of the hardware initialization, including + memory initialization. Reverse engineering and replacing this blob is almost impossible, due to how complex it is. Even for the most skilled developer, + it would take years to replace. Intel distributes this blob to firmware developers, without source. </p> <h3 id="intelbastards">Intel is uncooperative <span class="ref">(<a href="#intelbastards">#intelbastards</a>)</span></h3> <p> |