1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
|
From 146d781ece056408e0ba28b4c8d7a46df6d0257a Mon Sep 17 00:00:00 2001
From: Timothy Pearson <tpearson@raptorengineeringinc.com>
Date: Sat, 27 Jun 2015 17:52:18 -0500
Subject: [PATCH 079/139] northbridge/amd/amdmct/mct_ddr3: Properly indicate
clobbered registers
Change-Id: Icb2754143762bd64ee1df5674fa071de1c595eaf
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
---
src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h b/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h
index f6aa755..cc8d971 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d_gcc.h
@@ -123,6 +123,9 @@ static void proc_CLFLUSH(u32 addr_hi)
static void WriteLNTestPattern(u32 addr_lo, u8 *buf_a, u32 line_num)
{
+ uint32_t step = 16;
+ uint32_t count = line_num * 4;
+
__asm__ volatile (
/*prevent speculative execution of following instructions*/
/* FIXME: needed ? */
@@ -135,7 +138,7 @@ static void WriteLNTestPattern(u32 addr_lo, u8 *buf_a, u32 line_num)
"loop 1b\n\t"
"mfence\n\t"
- :: "a" (addr_lo), "d" (16), "c" (line_num * 4), "b"(buf_a)
+ : "+a" (addr_lo), "+d" (step), "+c" (count), "+b" (buf_a) : :
);
}
@@ -255,6 +258,10 @@ static void ReadMaxRdLat1CLTestPattern_D(u32 addr)
static void WriteMaxRdLat1CLTestPattern_D(u32 buf, u32 addr)
{
+ uint32_t addr_phys = addr << 8;
+ uint32_t step = 16;
+ uint32_t count = 3 * 4;
+
SetUpperFSbase(addr);
__asm__ volatile (
@@ -267,7 +274,7 @@ static void WriteMaxRdLat1CLTestPattern_D(u32 buf, u32 addr)
"loop 1b\n\t"
"mfence\n\t"
- :: "a" (addr<<8), "d" (16), "c" (3 * 4), "b"(buf)
+ : "+a" (addr_phys), "+d" (step), "+c" (count), "+b" (buf) : :
);
}
--
1.9.1
|
