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From a6a582cfbcca2814deac138693ad1fb9c5165eb6 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Sat, 14 May 2016 04:17:14 +0200
Subject: [PATCH] t60: enable c4 and new style to _CST table
this change is identical to the x60 change in
mainboard.c
TEST= Build and boot platform. See if there is a state4
in /sys/devices/system/cpu/cpu0/cpuidle/
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
src/mainboard/lenovo/t60/mainboard.c | 39 +++++++++++++++++++++++++++++++++---
1 file changed, 36 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c
index 44fa402..4a444ed 100644
--- a/src/mainboard/lenovo/t60/mainboard.c
+++ b/src/mainboard/lenovo/t60/mainboard.c
@@ -34,10 +34,43 @@
#include <drivers/intel/gma/int15.h>
#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
+#define MWAIT_RES(state, sub_state) \
+ { \
+ .space_id = ACPI_ADDRESS_SPACE_FIXED, \
+ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
+ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
+ { \
+ .resv = 0, \
+ }, \
+ .addrl = (((state) << 4) | (sub_state)), \
+ .addrh = 0, \
+ }
+
static acpi_cstate_t cst_entries[] = {
- { 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
- { 2, 1, 500, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV2, 0 } },
- { 2, 17, 250, { 0x01, 8, 0, { 0 }, DEFAULT_PMBASE + LV3, 0 } },
+ {
+ .ctype = 1,
+ .latency = 1,
+ .power = 1000,
+ .resource = MWAIT_RES(0, 0),
+ },
+ {
+ .ctype = 2,
+ .latency = 1,
+ .power = 500,
+ .resource = MWAIT_RES(1, 0),
+ },
+ {
+ .ctype = 3,
+ .latency = 17,
+ .power = 250,
+ .resource = MWAIT_RES(2, 0),
+ },
+ {
+ .ctype = 3,
+ .latency = 34,
+ .power = 200,
+ .resource = MWAIT_RES(3, 0),
+ },
};
int get_cst_entries(acpi_cstate_t **entries)
--
2.8.2
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