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-rw-r--r--resources/utilities/ich9deblob/src/descriptor/descriptor.c370
-rw-r--r--resources/utilities/ich9deblob/src/descriptor/descriptor.h123
2 files changed, 450 insertions, 43 deletions
diff --git a/resources/utilities/ich9deblob/src/descriptor/descriptor.c b/resources/utilities/ich9deblob/src/descriptor/descriptor.c
index 92456ef..1e434be 100644
--- a/resources/utilities/ich9deblob/src/descriptor/descriptor.c
+++ b/resources/utilities/ich9deblob/src/descriptor/descriptor.c
@@ -115,6 +115,376 @@ struct DESCRIPTORREGIONRECORD deblobbedDescriptorStructFromFactory(struct DESCRI
/*
* ---------------------------------------------------------------------
+ * C code generator (self-writing code)
+ * ---------------------------------------------------------------------
+ */
+
+/*
+ * Generate a C (.h) header file for the C source file made by notCreatedCFileFromDescriptorStruct()
+ *
+ * Output it to a file.
+ */
+int notCreatedHFileForDescriptorCFile(char* outFileName, char* cFileName)
+{
+ remove(outFileName); /* Remove the old file before continuing */
+
+ /* Open the file that will be written to */
+ FILE* fp = fopen(outFileName, "w+");
+
+ /* ------------------------------ */
+
+ fprintf(fp, "/* %s: generated C code from ich9deblob */\n", outFileName);
+ fprintf(fp, "/* .h header file for the descriptor-generating C code (%s) */\n\n", cFileName);
+
+ fprintf(fp, "#ifndef ICH9GEN_MKDESCRIPTOR_H\n");
+ fprintf(fp, "#define ICH9GEN_MKDESCRIPTOR_H\n\n");
+
+ fprintf(fp, "#include <stdio.h>\n");
+ fprintf(fp, "#include <string.h>\n");
+ fprintf(fp, "#include \"../descriptor/descriptor.h\"\n\n");
+
+ fprintf(fp, "/* ROM image sizes in bytes */\n");
+ fprintf(fp, "#define ROMSIZE_4MB 0x400000\n");
+ fprintf(fp, "#define ROMSIZE_8MB 0x800000\n\n");
+
+ fprintf(fp, "struct DESCRIPTORREGIONRECORD generatedDescriptorStruct(unsigned int romSize);\n");
+ fprintf(fp, "struct DESCRIPTORREGIONRECORD generatedDescriptorStructRom4M();\n");
+ fprintf(fp, "struct DESCRIPTORREGIONRECORD generatedDescriptorStructRom8M();\n");
+
+ fprintf(fp, "#endif\n");
+
+ /* ------------------------------ */
+
+ fclose(fp); /* Always close the file when done. */
+
+ return 0;
+}
+
+/*
+ * Generate a C source file that initializes the same data from a given
+ * 4KiB Descriptor data structure.
+ *
+ * Output it to a file.
+ */
+int notCreatedCFileFromDescriptorStruct(struct DESCRIPTORREGIONRECORD descriptorStruct, char* outFileName, char* headerFileName)
+{
+ int i, j;
+
+ remove(outFileName); /* Remove the old file before continuing */
+
+ /* Open the file that will be written to */
+ FILE* fp = fopen(outFileName, "w+");
+
+ /* ------------------------------ */
+
+ fprintf(fp, "/* %s: generated C code from ich9deblob */\n", outFileName);
+ fprintf(fp, "/* .c source file for the descriptor-generating C code */\n\n");
+
+ fprintf(fp, "#include \"%s\"\n\n", headerFileName);
+
+ fprintf(fp, "/* Generate a 4KiB Descriptor struct, with default values. */\n");
+ fprintf(fp, "/* Read ../descriptor/descriptor.h for an explanation of the default values used here */\n\n");
+
+ fprintf(fp, "struct DESCRIPTORREGIONRECORD generatedDescriptorStruct(unsigned int romSize)\n");
+ fprintf(fp, "{\n");
+ fprintf(fp, " int i;\n");
+ fprintf(fp, " struct DESCRIPTORREGIONRECORD descriptorStruct;\n");
+ fprintf(fp, "\n");
+ /* Flash Valid Signature Register */
+ fprintf(fp, " /* Flash Valid Signature Register */\n");
+ fprintf(fp, " descriptorStruct.flValSig.signature = 0x%08x;\n", descriptorStruct.flValSig.signature);
+ fprintf(fp, "\n");
+ /* Flash Map Registers */
+ fprintf(fp, " /* Flash Map Registers */\n");
+ fprintf(fp, " /* FLMAP0 */\n");
+ fprintf(fp, " descriptorStruct.flMaps.flMap0.FCBA = 0x%02x;\n", descriptorStruct.flMaps.flMap0.FCBA);
+ fprintf(fp, " descriptorStruct.flMaps.flMap0.NC = 0x%01x;\n", descriptorStruct.flMaps.flMap0.NC);
+ fprintf(fp, " descriptorStruct.flMaps.flMap0.reserved1 = 0x%02x;\n", descriptorStruct.flMaps.flMap0.reserved1);
+ fprintf(fp, " descriptorStruct.flMaps.flMap0.FRBA = 0x%02x;\n", descriptorStruct.flMaps.flMap0.FRBA);
+ fprintf(fp, " descriptorStruct.flMaps.flMap0.NR = 0x%01x;\n", descriptorStruct.flMaps.flMap0.NR);
+ fprintf(fp, " descriptorStruct.flMaps.flMap0.reserved2 = 0x%02x;\n", descriptorStruct.flMaps.flMap0.reserved2);
+ fprintf(fp, " /* FLMAP1 */\n");
+ fprintf(fp, " descriptorStruct.flMaps.flMap1.FMBA = 0x%02x;\n", descriptorStruct.flMaps.flMap1.FMBA);
+ fprintf(fp, " descriptorStruct.flMaps.flMap1.NM = 0x%01x;\n", descriptorStruct.flMaps.flMap1.NM);
+ fprintf(fp, " descriptorStruct.flMaps.flMap1.reserved = 0x%02x;\n", descriptorStruct.flMaps.flMap1.reserved);
+ fprintf(fp, " descriptorStruct.flMaps.flMap1.FISBA = 0x%02x;\n", descriptorStruct.flMaps.flMap1.FISBA);
+ fprintf(fp, " descriptorStruct.flMaps.flMap1.ISL = 0x%02x;\n", descriptorStruct.flMaps.flMap1.ISL);
+ fprintf(fp, " /* FLMAP2 */\n");
+ fprintf(fp, " descriptorStruct.flMaps.flMap2.FMSBA = 0x%02x;\n", descriptorStruct.flMaps.flMap2.FMSBA);
+ fprintf(fp, " descriptorStruct.flMaps.flMap2.MSL = 0x%02x;\n", descriptorStruct.flMaps.flMap2.MSL);
+ fprintf(fp, " descriptorStruct.flMaps.flMap2.reserved = 0x%04x;\n", descriptorStruct.flMaps.flMap2.reserved);
+ fprintf(fp, "\n");
+ /* Component Section Record */
+ fprintf(fp, " /* Component Section Record */\n");
+ fprintf(fp, " /* FLCOMP */\n");
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.component1Density = 0x%01x;\n", descriptorStruct.componentSection.flcomp.component1Density);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.component2Density = 0x%01x;\n", descriptorStruct.componentSection.flcomp.component2Density);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.reserved1 = 0x%01x;\n", descriptorStruct.componentSection.flcomp.reserved1);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.reserved2 = 0x%02x;\n", descriptorStruct.componentSection.flcomp.reserved2);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.reserved3 = 0x%01x;\n", descriptorStruct.componentSection.flcomp.reserved3);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.readClockFrequency = 0x%01x;\n", descriptorStruct.componentSection.flcomp.readClockFrequency);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.fastReadSupport = 0x%01x;\n", descriptorStruct.componentSection.flcomp.fastReadSupport);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.fastreadClockFrequency = 0x%01x;\n", descriptorStruct.componentSection.flcomp.fastreadClockFrequency);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.writeEraseClockFrequency = 0x%01x;\n", descriptorStruct.componentSection.flcomp.writeEraseClockFrequency);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.readStatusClockFrequency = 0x%01x;\n", descriptorStruct.componentSection.flcomp.readStatusClockFrequency);
+ fprintf(fp, " descriptorStruct.componentSection.flcomp.reserved4 = 0x%01x;\n", descriptorStruct.componentSection.flcomp.reserved4);
+ fprintf(fp, " /* FLILL */\n");
+ fprintf(fp, " descriptorStruct.componentSection.flill = 0x%08x;\n", descriptorStruct.componentSection.flill);
+ fprintf(fp, " /* FLPB */\n");
+ fprintf(fp, " descriptorStruct.componentSection.flpb = 0x%08x;\n", descriptorStruct.componentSection.flpb);
+ fprintf(fp, " /* Padding */\n");
+ for (i = 0; i < 36; i++) {
+ if (descriptorStruct.componentSection.padding[i] != 0xFF) {
+ for (j = 0; j < 36; j++) {
+ fprintf(fp, " descriptorStruct.componentSection.padding[%d] = 0x%02x;\n", j, descriptorStruct.componentSection.padding[j]);
+ }
+ break;
+ } else if (i == 35) {
+ fprintf(fp, " for (i = 0; i < 36; i++) {\n");
+ fprintf(fp, " descriptorStruct.componentSection.padding[i] = 0xFF;\n");
+ fprintf(fp, " }\n");
+ break;
+ }
+ }
+ fprintf(fp, "\n");
+ /* Flash Descriptor Region Section */
+ fprintf(fp, " /* Flash Descriptor Region Section */\n");
+ fprintf(fp, " /* FLREG0 (Descriptor) */\n");
+ fprintf(fp, " descriptorStruct.regionSection.flReg0.BASE = 0x%04x;\n", descriptorStruct.regionSection.flReg0.BASE);
+ fprintf(fp, " descriptorStruct.regionSection.flReg0.reserved1 = 0x%01x;\n", descriptorStruct.regionSection.flReg0.reserved1);
+ fprintf(fp, " descriptorStruct.regionSection.flReg0.LIMIT = 0x%04x;\n", descriptorStruct.regionSection.flReg0.LIMIT);
+ fprintf(fp, " descriptorStruct.regionSection.flReg0.reserved2 = 0x%01x;\n", descriptorStruct.regionSection.flReg0.reserved2);
+ fprintf(fp, " /* FLREG1 (BIOS) */\n");
+ fprintf(fp, " descriptorStruct.regionSection.flReg1.BASE = 0x%04x;\n", descriptorStruct.regionSection.flReg1.BASE);
+ fprintf(fp, " descriptorStruct.regionSection.flReg1.reserved1 = 0x%01x;\n", descriptorStruct.regionSection.flReg1.reserved1);
+ fprintf(fp, " descriptorStruct.regionSection.flReg1.LIMIT = ((romSize >> FLREGIONBITSHIFT) - 1);\n");
+ fprintf(fp, " descriptorStruct.regionSection.flReg1.reserved2 = 0x%01x;\n", descriptorStruct.regionSection.flReg1.reserved2);
+ fprintf(fp, " /* FLREG2 (ME) */\n");
+ fprintf(fp, " descriptorStruct.regionSection.flReg2.BASE = 0x%04x; /* 0x1FFF to disable */\n", descriptorStruct.regionSection.flReg2.BASE);
+ fprintf(fp, " descriptorStruct.regionSection.flReg2.reserved1 = 0x%01x;\n", descriptorStruct.regionSection.flReg2.reserved1);
+ fprintf(fp, " descriptorStruct.regionSection.flReg2.LIMIT = 0x%04x; /* 0x0000 to disable */\n", descriptorStruct.regionSection.flReg2.LIMIT);
+ fprintf(fp, " descriptorStruct.regionSection.flReg2.reserved2 = 0x%01x;\n", descriptorStruct.regionSection.flReg2.reserved2);
+ fprintf(fp, " /* FLREG3 (Gbe) */\n");
+ fprintf(fp, " descriptorStruct.regionSection.flReg3.BASE = 0x%04x;\n", descriptorStruct.regionSection.flReg3.BASE);
+ fprintf(fp, " descriptorStruct.regionSection.flReg3.reserved1 = 0x%01x;\n", descriptorStruct.regionSection.flReg3.reserved1);
+ fprintf(fp, " descriptorStruct.regionSection.flReg3.LIMIT = 0x%04x;\n", descriptorStruct.regionSection.flReg3.LIMIT);
+ fprintf(fp, " descriptorStruct.regionSection.flReg3.reserved2 = 0x%01x;\n", descriptorStruct.regionSection.flReg3.reserved2);
+ fprintf(fp, " /* FLREG4 (Platform) */\n");
+ fprintf(fp, " descriptorStruct.regionSection.flReg4.BASE = 0x%04x; /* 0x1FFF to disable */\n", descriptorStruct.regionSection.flReg4.BASE);
+ fprintf(fp, " descriptorStruct.regionSection.flReg4.reserved1 = 0x%01x;\n", descriptorStruct.regionSection.flReg4.reserved1);
+ fprintf(fp, " descriptorStruct.regionSection.flReg4.LIMIT = 0x%04x; /* 0x0000 to disable */\n", descriptorStruct.regionSection.flReg4.LIMIT);
+ fprintf(fp, " descriptorStruct.regionSection.flReg4.reserved2 = 0x%01x;\n", descriptorStruct.regionSection.flReg4.reserved2);
+ fprintf(fp, " /* Padding */\n");
+ for (i = 0; i < 12; i++) {
+ if (descriptorStruct.regionSection.padding[i] != 0xFF) {
+ for (j = 0; j < 12; j++) {
+ fprintf(fp, " descriptorStruct.regionSection.padding[%d] = 0x%02x;\n", j, descriptorStruct.regionSection.padding[j]);
+ }
+ break;
+ } else if (i == 11) {
+ fprintf(fp, " for (i = 0; i < 12; i++) {\n");
+ fprintf(fp, " descriptorStruct.regionSection.padding[i] = 0xFF;\n");
+ fprintf(fp, " }\n");
+ break;
+ }
+ }
+ fprintf(fp, "\n");
+ /* Master Access Section */
+ fprintf(fp, " /* Master Access Section */\n");
+ fprintf(fp, " /* FLMSTR1 (Host CPU / BIOS) */\n");
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.requesterId = 0x%04x;\n", descriptorStruct.masterAccessSection.flMstr1.requesterId);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.fdRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.fdRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.biosRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.biosRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.meRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.meRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.gbeRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.gbeRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.pdRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.pdRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.reserved1 = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.reserved1);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr1.reserved2 = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr1.reserved2);
+ fprintf(fp, " /* FLMSTR2 (ME) */\n");
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.requesterId = 0x%04x;\n", descriptorStruct.masterAccessSection.flMstr2.requesterId);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.fdRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.fdRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.biosRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.biosRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.meRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.meRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.gbeRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.gbeRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.pdRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.pdRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.reserved1 = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.reserved1);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.fdRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.fdRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.biosRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.biosRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.meRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.meRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.gbeRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.gbeRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.pdRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.pdRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr2.reserved2 = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr2.reserved2);
+ fprintf(fp, " /* FLMSTR3 (Gbe) */\n");
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.requesterId = 0x%04x;\n", descriptorStruct.masterAccessSection.flMstr3.requesterId);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.fdRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.fdRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.biosRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.biosRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.meRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.meRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.gbeRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.gbeRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.pdRegionReadAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.pdRegionReadAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.reserved1 = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.reserved1);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.fdRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.fdRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.biosRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.biosRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.meRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.meRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.gbeRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.gbeRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.pdRegionWriteAccess = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.pdRegionWriteAccess);
+ fprintf(fp, " descriptorStruct.masterAccessSection.flMstr3.reserved2 = 0x%01x;\n", descriptorStruct.masterAccessSection.flMstr3.reserved2);
+ fprintf(fp, " /* Padding */\n");
+ for (i = 0; i < 148; i++) {
+ if (descriptorStruct.masterAccessSection.padding[i] != 0xFF) {
+ for (j = 0; j < 148; j++) {
+ fprintf(fp, " descriptorStruct.masterAccessSection.padding[%d] = 0x%02x;\n", j, descriptorStruct.masterAccessSection.padding[j]);
+ }
+ break;
+ } else if (i == 147) {
+ fprintf(fp, " for (i = 0; i < 148; i++) {\n");
+ fprintf(fp, " descriptorStruct.masterAccessSection.padding[i] = 0xFF;\n");
+ fprintf(fp, " }\n");
+ break;
+ }
+ }
+ fprintf(fp, "\n");
+ /* ICH straps */
+ fprintf(fp, " /* ICH straps */\n");
+ fprintf(fp, " /* ICHSTRAP0 */\n");
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.meDisable = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap0.meDisable);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.reserved1 = 0x%02x;\n", descriptorStruct.ichStraps.ichStrap0.reserved1);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.tcoMode = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap0.tcoMode);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.smBusAddress = 0x%02x;\n", descriptorStruct.ichStraps.ichStrap0.smBusAddress);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.bmcMode = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap0.bmcMode);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.tripPointSelect = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap0.tripPointSelect);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.reserved2 = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap0.reserved2);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.integratedGbe = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap0.integratedGbe);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.lanPhy = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap0.lanPhy);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.reserved3 = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap0.reserved3);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.dmiRequesterId = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap0.dmiRequesterId);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap0.smBus2Address = 0x%02x;\n", descriptorStruct.ichStraps.ichStrap0.smBus2Address);
+ fprintf(fp, " /* ICHSTRAP1 */\n");
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap1.northMlink = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap1.northMlink);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap1.southMlink = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap1.southMlink);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap1.meSmbus = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap1.meSmbus);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap1.sstDynamic = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap1.sstDynamic);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap1.reserved1 = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap1.reserved1);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap1.northMlink2 = 0x%01x;\n", descriptorStruct.ichStraps.ichStrap1.northMlink2);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap1.reserved2 = 0x%02x;\n", descriptorStruct.ichStraps.ichStrap1.reserved2);
+ fprintf(fp, " descriptorStruct.ichStraps.ichStrap1.reserved3 = 0x%04x;\n", descriptorStruct.ichStraps.ichStrap1.reserved3);
+ fprintf(fp, " /* Padding */\n");
+ for (i = 0; i < 248; i++) {
+ if (descriptorStruct.ichStraps.padding[i] != 0xFF) {
+ for (j = 0; j < 248; j++) {
+ fprintf(fp, " descriptorStruct.ichStraps.padding[%d] = 0x%02x;\n", j, descriptorStruct.ichStraps.padding[j]);
+ }
+ break;
+ } else if (i == 247) {
+ fprintf(fp, " for (i = 0; i < 248; i++) {\n");
+ fprintf(fp, " descriptorStruct.ichStraps.padding[i] = 0xFF;\n");
+ fprintf(fp, " }\n");
+ break;
+ }
+ }
+ fprintf(fp, "\n");
+ /* MCH straps */
+ fprintf(fp, " /* MCH straps */\n");
+ fprintf(fp, " /* MCHSTRAP0 */\n");
+ fprintf(fp, " descriptorStruct.mchStraps.mchStrap0.meDisable = 0x%01x;\n", descriptorStruct.mchStraps.mchStrap0.meDisable);
+ fprintf(fp, " descriptorStruct.mchStraps.mchStrap0.meBootFromFlash = 0x%01x;\n", descriptorStruct.mchStraps.mchStrap0.meBootFromFlash);
+ fprintf(fp, " descriptorStruct.mchStraps.mchStrap0.tpmDisable = 0x%01x;\n", descriptorStruct.mchStraps.mchStrap0.tpmDisable);
+ fprintf(fp, " descriptorStruct.mchStraps.mchStrap0.reserved1 = 0x%01x;\n", descriptorStruct.mchStraps.mchStrap0.reserved1);
+ fprintf(fp, " descriptorStruct.mchStraps.mchStrap0.spiFingerprint = 0x%01x;\n", descriptorStruct.mchStraps.mchStrap0.spiFingerprint);
+ fprintf(fp, " descriptorStruct.mchStraps.mchStrap0.meAlternateDisable = 0x%01x;\n", descriptorStruct.mchStraps.mchStrap0.meAlternateDisable);
+ fprintf(fp, " descriptorStruct.mchStraps.mchStrap0.reserved2 = 0x%02x;\n", descriptorStruct.mchStraps.mchStrap0.reserved2);
+ fprintf(fp, " descriptorStruct.mchStraps.mchStrap0.reserved3 = 0x%04x;\n", descriptorStruct.mchStraps.mchStrap0.reserved3);
+ fprintf(fp, " /* Padding */\n");
+ for (i = 0; i < 3292; i++) {
+ if (descriptorStruct.mchStraps.padding[i] != 0xFF) {
+ for (j = 0; j < 3292; j++) {
+ fprintf(fp, " descriptorStruct.mchStraps.padding[%d] = 0x%02x;\n", j, descriptorStruct.mchStraps.padding[j]);
+ }
+ break;
+ } else if (i == 3291) {
+ fprintf(fp, " for (i = 0; i < 3292; i++) {\n");
+ fprintf(fp, " descriptorStruct.mchStraps.padding[i] = 0xFF;\n");
+ fprintf(fp, " }\n");
+ break;
+ }
+ }
+ fprintf(fp, "\n");
+ /* ME VSCC Table */
+ fprintf(fp, " /* ME VSCC Table */\n");
+ fprintf(fp, " descriptorStruct.meVsccTable.jid0 = 0x%08x;\n", descriptorStruct.meVsccTable.jid0);
+ fprintf(fp, " descriptorStruct.meVsccTable.vscc0 = 0x%08x;\n", descriptorStruct.meVsccTable.vscc0);
+ fprintf(fp, " descriptorStruct.meVsccTable.jid1 = 0x%08x;\n", descriptorStruct.meVsccTable.jid1);
+ fprintf(fp, " descriptorStruct.meVsccTable.vscc1 = 0x%08x;\n", descriptorStruct.meVsccTable.vscc1);
+ fprintf(fp, " descriptorStruct.meVsccTable.jid2 = 0x%08x;\n", descriptorStruct.meVsccTable.jid2);
+ fprintf(fp, " descriptorStruct.meVsccTable.vscc2 = 0x%08x;\n", descriptorStruct.meVsccTable.vscc2);
+ fprintf(fp, " /* Padding */\n");
+ for (i = 0; i < 4; i++) {
+ if (descriptorStruct.meVsccTable.padding[i] != 0xFF) {
+ for (j = 0; j < 4; j++) {
+ fprintf(fp, " descriptorStruct.meVsccTable.padding[%d] = 0x%02x;\n", j, descriptorStruct.meVsccTable.padding[j]);
+ }
+ break;
+ } else if (i == 3) {
+ fprintf(fp, " for (i = 0; i < 4; i++) {\n");
+ fprintf(fp, " descriptorStruct.meVsccTable.padding[i] = 0xFF;\n");
+ fprintf(fp, " }\n");
+ break;
+ }
+ }
+ fprintf(fp, "\n");
+ /* Descriptor Map 2 Record */
+ fprintf(fp, " /* Descriptor Map 2 Record */\n");
+ fprintf(fp, " descriptorStruct.descriptor2Map.meVsccTableBaseAddress = 0x%02x;\n", descriptorStruct.descriptor2Map.meVsccTableBaseAddress);
+ fprintf(fp, " descriptorStruct.descriptor2Map.meVsccTableLength = 0x%02x;\n", descriptorStruct.descriptor2Map.meVsccTableLength);
+ fprintf(fp, " descriptorStruct.descriptor2Map.reserved = 0x%04x;\n", descriptorStruct.descriptor2Map.reserved);
+ fprintf(fp, "\n");
+ /* OEM section */
+ fprintf(fp, " /* OEM section */\n");
+ fprintf(fp, " /* Magic String (ascii characters) */\n");
+ for(i = 0; i < 8; i++) {
+ fprintf(fp, " descriptorStruct.oemSection.magicString[%d] = 0x%02x;\n", i, descriptorStruct.oemSection.magicString[i]);
+ }
+ fprintf(fp, " /* Padding */\n");
+ for (i = 0; i < 248; i++) {
+ if (descriptorStruct.oemSection.padding[i] != 0xFF) {
+ for (j = 0; j < 248; j++) {
+ fprintf(fp, " descriptorStruct.oemSection.padding[%d] = 0x%02x;\n", j, descriptorStruct.oemSection.padding[j]);
+ }
+ break;
+ } else if (i == 247) {
+ fprintf(fp, " for (i = 0; i < 248; i++) {\n");
+ fprintf(fp, " descriptorStruct.oemSection.padding[i] = 0xFF;\n");
+ fprintf(fp, " }\n");
+ break;
+ }
+ }
+ fprintf(fp, "\n");
+ fprintf(fp, " return descriptorStruct;\n");
+ fprintf(fp, "}\n\n");
+
+ fprintf(fp, "struct DESCRIPTORREGIONRECORD generatedDescriptorStructRom4M()\n");
+ fprintf(fp, "{\n");
+ fprintf(fp, " return generatedDescriptorStruct(ROMSIZE_4MB);\n");
+ fprintf(fp, "}\n\n");
+
+ fprintf(fp, "struct DESCRIPTORREGIONRECORD generatedDescriptorStructRom8M()\n");
+ fprintf(fp, "{\n");
+ fprintf(fp, " return generatedDescriptorStruct(ROMSIZE_8MB);\n");
+ fprintf(fp, "}\n\n");
+
+ /* ------------------------------ */
+
+ fclose(fp); /* Always close the file when done. */
+
+ return 0;
+}
+
+/*
+ * ---------------------------------------------------------------------
* Debugging functions:
* ---------------------------------------------------------------------
*/
diff --git a/resources/utilities/ich9deblob/src/descriptor/descriptor.h b/resources/utilities/ich9deblob/src/descriptor/descriptor.h
index ecef537..8648c98 100644
--- a/resources/utilities/ich9deblob/src/descriptor/descriptor.h
+++ b/resources/utilities/ich9deblob/src/descriptor/descriptor.h
@@ -31,7 +31,7 @@
/*
* See docs/hcl/x200_remove_me.html for info plus links to datasheet (also linked below)
*
- * Info about flash descriptor (read page 850 onwards):
+ * Info about flash descriptor (read page 845 onwards):
* http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf
*/
@@ -58,52 +58,51 @@
* ---------------------------------------------------------------------
*/
+/* Flash Valid Signature Register */
struct FLVALSIG
{
- unsigned int signature;
+ /*
+ * 4 bytes.
+ * descriptor mode = 0FF0A55A (hex, big endian). Note: stored in ROM in little endian order.
+ * Anything else is considered invalid and will put the machine in non-descriptor mode.
+ */
+ unsigned int signature; /* Put 0x0FF0A55A here. confirmed in deblobbed_descriptor.bin */
};
-struct FLMAP0
+/* */
+struct FLMAP0
{
/* least signicant bits */
unsigned char FCBA : 8;
unsigned char NC : 2;
unsigned char reserved1 : 6;
- /*
- * ^^^^ unnamed members like these represent unused bits (per datasheet).
- * the same applies for all structs in this file.
- */
unsigned char FRBA : 8;
unsigned char NR : 3;
unsigned char reserved2 : 5;
/* most significant bits. */
-
- /*
- * the datasheet lists msb's first and lsb's last, in each table.
- * meanwhile, x86 gcc treats the members at the top of the struct as lsb's
- * and at the bottom of the struct, the members there are msb's. The same
- * fact applies to all the other structs below.
- *
- * non-x86 (and/or non-gcc) is untested. little endian assumed.
- */
};
struct FLMAP1
{
+ /* least significant bits */
unsigned char FMBA : 8;
unsigned char NM : 3;
unsigned char reserved : 5;
unsigned char FISBA : 8;
unsigned char ISL : 8;
+ /* most significant bits */
};
struct FLMAP2
{
+ /* least significant bits */
unsigned char FMSBA : 8;
unsigned char MSL : 8;
unsigned short reserved : 16;
+ /* most significant bits */
};
+/* Flash Map Registers */
struct FLMAPS
{
struct FLMAP0 flMap0;
@@ -111,8 +110,10 @@ struct FLMAPS
struct FLMAP2 flMap2;
};
+/* Flash Components Register */
struct FLCOMP
{
+ /* least significant bits */
unsigned char component1Density : 3;
unsigned char component2Density : 3;
unsigned char reserved1 : 2;
@@ -124,6 +125,7 @@ struct FLCOMP
unsigned char writeEraseClockFrequency : 3;
unsigned char readStatusClockFrequency : 3;
unsigned char reserved4 : 2;
+ /* most significant bits */
};
struct COMPONENTSECTIONRECORD
@@ -136,12 +138,19 @@ struct COMPONENTSECTIONRECORD
struct FLREG
{
+ /* least significant bits */
unsigned short BASE : 13;
unsigned short reserved1 : 3;
unsigned short LIMIT : 13;
unsigned short reserved2 : 3;
+ /* most significant bits */
};
+/* Flash Descriptor Region Section */
+/*
+ * Defines where all the regions begin/end.
+ * This is very important for disabling ME/AMT
+ */
struct REGIONSECTIONRECORD
{
struct FLREG flReg0; /* Descriptor */
@@ -152,8 +161,10 @@ struct REGIONSECTIONRECORD
unsigned char padding[12];
};
-struct FLMSTR {
- unsigned short requesterId : 16;
+struct FLMSTR
+{
+ /* least significant bits */
+ unsigned short requesterId : 16;
unsigned char fdRegionReadAccess : 1;
unsigned char biosRegionReadAccess : 1;
unsigned char meRegionReadAccess : 1;
@@ -166,17 +177,21 @@ struct FLMSTR {
unsigned char gbeRegionWriteAccess : 1;
unsigned char pdRegionWriteAccess : 1;
unsigned char reserved2 : 3; /* Must be zero, according to datasheet */
+ /* most significant bits */
};
-
-struct MASTERACCESSSECTIONRECORD {
- struct FLMSTR flMstr1;
- struct FLMSTR flMstr2;
- struct FLMSTR flMstr3;
+/* Master Access Section */
+struct MASTERACCESSSECTIONRECORD
+{
+ struct FLMSTR flMstr1; /* Flash Master 1 (Host CPU / BIOS) */
+ struct FLMSTR flMstr2; /* Flash Master 2 (ME) */
+ struct FLMSTR flMstr3; /* Flash Master 3 (Gbe) */
unsigned char padding[148];
};
-struct ICHSTRAP0 {
+struct ICHSTRAP0
+{
+ /* least significant bits */
/* todo: add MeSmBus2Sel (boring setting) */
unsigned char meDisable : 1; /* If true, ME is disabled. */
unsigned char reserved1 : 6;
@@ -190,9 +205,12 @@ struct ICHSTRAP0 {
unsigned char reserved3 : 3;
unsigned char dmiRequesterId : 1; /* DMI requestor ID security check disable: The primary purpose of this strap is to support server environments with multiple CPUs that each have a different RequesterID that can access the Flash. */
unsigned char smBus2Address : 7; /* The ME SmBus 2 7-bit address. */
+ /* most significant bits */
};
-struct ICHSTRAP1 {
+struct ICHSTRAP1
+{
+ /* least significant bits */
unsigned char northMlink : 1; /* North MLink Dynamic Clock Gate Disable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers. */
unsigned char southMlink : 1; /* South MLink Dynamic Clock Gate Enable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers. */
unsigned char meSmbus : 1; /* ME SmBus Dynamic Clock Gate Enable : Sets the default value for the ME SMBus Dynamic Clock Gate Enable for both the ME SmBus controllers. */
@@ -201,16 +219,20 @@ struct ICHSTRAP1 {
unsigned char northMlink2 : 1; /* North MLink 2 Non-Posted Enable : 'true':North MLink supports two downstream non-posted requests. 'false':North MLink supports one downstream non-posted requests. */
unsigned char reserved2 : 7;
unsigned short reserved3 : 16;
+ /* most significant bits */
};
-
-struct ICHSTRAPSRECORD {
+/* ICH straps */
+struct ICHSTRAPSRECORD
+{
struct ICHSTRAP0 ichStrap0;
struct ICHSTRAP1 ichStrap1;
unsigned char padding[248];
};
-struct MCHSTRAP0 {
+struct MCHSTRAP0
+{
+ /* least significant bits */
unsigned char meDisable : 1; /* If true, ME is disabled. */
unsigned char meBootFromFlash : 1; /* ME boot from Flash - guessed location */
unsigned char tpmDisable : 1; /* iTPM Disable : When set true, iTPM Host Interface is disabled. When set false (default), iTPM is enabled. */
@@ -219,14 +241,19 @@ struct MCHSTRAP0 {
unsigned char meAlternateDisable : 1; /* ME Alternate Disable: Setting this bit allows ME to perform critical chipset functions but prevents loading of any ME FW applications. */
unsigned char reserved2 : 8;
unsigned short reserved3 : 16;
+ /* most significant bits */
};
-struct MCHSTRAPSRECORD {
+/* MCH straps */
+struct MCHSTRAPSRECORD
+{
struct MCHSTRAP0 mchStrap0;
unsigned char padding[3292];
};
-struct MEVSCCTABLERECORD {
+/* ME VSCC Table */
+struct MEVSCCTABLERECORD
+{
unsigned int jid0;
unsigned int vscc0;
unsigned int jid1;
@@ -236,28 +263,36 @@ struct MEVSCCTABLERECORD {
unsigned char padding[4];
};
-struct DESCRIPTORMAP2RECORD {
+/* Descriptor Map 2 Record */
+struct DESCRIPTORMAP2RECORD
+{
+ /* least significant bits */
unsigned char meVsccTableBaseAddress : 8;
unsigned char meVsccTableLength : 8;
unsigned short reserved : 16;
+ /* most significant bits */
};
-struct OEMSECTIONRECORD {
+/* OEM section */
+struct OEMSECTIONRECORD
+{
unsigned char magicString[8];
unsigned char padding[248];
};
-struct DESCRIPTORREGIONRECORD {
- struct FLVALSIG flValSig;
- struct FLMAPS flMaps;
- struct COMPONENTSECTIONRECORD componentSection;
- struct REGIONSECTIONRECORD regionSection;
- struct MASTERACCESSSECTIONRECORD masterAccessSection;
- struct ICHSTRAPSRECORD ichStraps;
- struct MCHSTRAPSRECORD mchStraps;
- struct MEVSCCTABLERECORD meVsccTable;
- struct DESCRIPTORMAP2RECORD descriptor2Map;
- struct OEMSECTIONRECORD oemSection;
+/* 4KiB descriptor region, goes at the beginning of the ROM image */
+struct DESCRIPTORREGIONRECORD
+{
+ struct FLVALSIG flValSig; /* Flash Valid Signature Register */
+ struct FLMAPS flMaps; /* Flash Map Registers */
+ struct COMPONENTSECTIONRECORD componentSection; /* Component Section Record */
+ struct REGIONSECTIONRECORD regionSection; /* Flash Descriptor Region Section */
+ struct MASTERACCESSSECTIONRECORD masterAccessSection; /* Master Access Section */
+ struct ICHSTRAPSRECORD ichStraps; /* ICH straps */
+ struct MCHSTRAPSRECORD mchStraps; /* MCH straps */
+ struct MEVSCCTABLERECORD meVsccTable; /* ME VSCC Table */
+ struct DESCRIPTORMAP2RECORD descriptor2Map; /* Descriptor Map 2 Record */
+ struct OEMSECTIONRECORD oemSection; /* OEM section */
};
/*
@@ -267,6 +302,8 @@ struct DESCRIPTORREGIONRECORD {
*/
struct DESCRIPTORREGIONRECORD deblobbedDescriptorStructFromFactory(struct DESCRIPTORREGIONRECORD factoryDescriptorStruct, unsigned int factoryRomSize);
+int notCreatedHFileForDescriptorCFile(char* outFileName, char* cFileName);
+int notCreatedCFileFromDescriptorStruct(struct DESCRIPTORREGIONRECORD descriptorStruct, char* outFileName, char* headerFileName);
void printDescriptorRegionLocations(struct DESCRIPTORREGIONRECORD descriptorStruct, char* romName);
#endif