diff options
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch')
-rw-r--r-- | resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch b/resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch new file mode 100644 index 0000000..0dc6ff3 --- /dev/null +++ b/resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch @@ -0,0 +1,28 @@ +From da9855ac660e4b527ca0ee754d792ea0ab361fcc Mon Sep 17 00:00:00 2001 +From: Timothy Pearson <kb9vqf@pearsoncomputing.net> +Date: Fri, 14 Aug 2015 02:50:44 -0500 +Subject: [PATCH 118/146] southbridge/amd/sr5650: Use correct PCI + configuration block offset + +--- + src/southbridge/amd/sr5650/acpi/sr5650.asl | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/src/southbridge/amd/sr5650/acpi/sr5650.asl b/src/southbridge/amd/sr5650/acpi/sr5650.asl +index a6ab114..1e0d5b0 100644 +--- a/src/southbridge/amd/sr5650/acpi/sr5650.asl ++++ b/src/southbridge/amd/sr5650/acpi/sr5650.asl +@@ -19,8 +19,8 @@ + */ + + Scope(\) { +- Name(PCBA, 0xE0000000) /* Base address of PCIe config space */ +- Name(HPBA, 0xFED00000) /* Base address of HPET table */ ++ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ ++ Name(HPBA, 0xFED00000) /* Base address of HPET table */ + + /* PIC IRQ mapping registers, C00h-C01h */ + OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002) +-- +1.7.9.5 + |