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Diffstat (limited to 'resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0016-nb-amd-mct_ddr3-Fix-RDIMM-training-failure-on-Fam15h.patch')
-rw-r--r--resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0016-nb-amd-mct_ddr3-Fix-RDIMM-training-failure-on-Fam15h.patch32
1 files changed, 32 insertions, 0 deletions
diff --git a/resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0016-nb-amd-mct_ddr3-Fix-RDIMM-training-failure-on-Fam15h.patch b/resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0016-nb-amd-mct_ddr3-Fix-RDIMM-training-failure-on-Fam15h.patch
new file mode 100644
index 0000000..ab731ac
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0016-nb-amd-mct_ddr3-Fix-RDIMM-training-failure-on-Fam15h.patch
@@ -0,0 +1,32 @@
+From 2888ba1b3ac0056183b05a37e6f24018a00339fa Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Tue, 24 Nov 2015 14:11:52 -0600
+Subject: [PATCH 16/45] nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h
+
+Certain registered DIMMs failed training due to an error
+likely introduced during historical rebase. Ensure that
+the SubMemclkRegDly bit is set according to BKDG
+recommendations on Family 15 processors.
+
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/northbridge/amd/amdmct/mct_ddr3/mctproc.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
+index cf13b40..fc62afb 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
+@@ -66,6 +66,9 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
+ misc2 |= ((cs_mux_67 & 0x1) << 27);
+ misc2 &= ~(0x1 << 26); /* CsMux45 = cs_mux_45 */
+ misc2 |= ((cs_mux_45 & 0x1) << 26);
++
++ if (pDCTstat->Status & (1 << SB_Registered))
++ misc2 |= 1 << SubMemclkRegDly;
+ } else if (pDCTstat->LogicalCPUID & (AMD_DR_Dx | AMD_DR_Cx)) {
+ if (pDCTstat->Status & (1 << SB_Registered)) {
+ misc2 |= 1 << SubMemclkRegDly;
+--
+2.1.4
+