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| author | Francis Rowe <info@gluglug.org.uk> | 2015-11-06 02:45:49 (EST) |
|---|---|---|
| committer | Francis Rowe <info@gluglug.org.uk> | 2015-11-06 03:01:51 (EST) |
| commit | 60453ff2cbd1befe24959fba1d24f734406444e3 (patch) | |
| tree | 74a6080455b2b00184fbc4a00503188032773986 /resources/libreboot/patch/kgpe-d16/0124-northbridge-amd-amdmct-mct_ddr3-Fix-a-minor-RDIMM-CS.patch | |
| parent | 51f5487e7d2c8809bdc7690fe26948064257b34d (diff) | |
| download | libreboot-60453ff2cbd1befe24959fba1d24f734406444e3.zip libreboot-60453ff2cbd1befe24959fba1d24f734406444e3.tar.gz libreboot-60453ff2cbd1befe24959fba1d24f734406444e3.tar.bz2 | |
Update coreboot to new version (use latest stable kgpe-d16 tree)
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0124-northbridge-amd-amdmct-mct_ddr3-Fix-a-minor-RDIMM-CS.patch')
| -rw-r--r-- | resources/libreboot/patch/kgpe-d16/0124-northbridge-amd-amdmct-mct_ddr3-Fix-a-minor-RDIMM-CS.patch | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0124-northbridge-amd-amdmct-mct_ddr3-Fix-a-minor-RDIMM-CS.patch b/resources/libreboot/patch/kgpe-d16/0124-northbridge-amd-amdmct-mct_ddr3-Fix-a-minor-RDIMM-CS.patch deleted file mode 100644 index 7040927..0000000 --- a/resources/libreboot/patch/kgpe-d16/0124-northbridge-amd-amdmct-mct_ddr3-Fix-a-minor-RDIMM-CS.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 352de00766d75d9b88a6021bfe5558a36923cc40 Mon Sep 17 00:00:00 2001 -From: Timothy Pearson <tpearson@raptorengineeringinc.com> -Date: Thu, 27 Aug 2015 13:18:53 -0500 -Subject: [PATCH 124/139] northbridge/amd/amdmct/mct_ddr3: Fix a minor RDIMM CS - select error - -Change-Id: I4cdfeec887813c17edcdee8858222414fb19b72c -Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> ---- - src/northbridge/amd/amdmct/mct_ddr3/mctrci.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c -index 624a543..8fd2523 100644 ---- a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c -+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c -@@ -236,7 +236,7 @@ void mct_DramControlReg_Init_D(struct MCTStatStruc *pMCTstat, - for (MrsChipSel = 0; MrsChipSel < 8; MrsChipSel ++, MrsChipSel ++) { - if (pDCTstat->CSPresent & (1 << MrsChipSel)) { - val = Get_NB32_DCT(dev, dct, 0xa8); -- val &= ~(0xf << 8); -+ val &= ~(0xff << 8); - - switch (MrsChipSel) { - case 0: -@@ -283,7 +283,7 @@ void FreqChgCtrlWrd(struct MCTStatStruc *pMCTstat, - /* 2. Program F2x[1, 0]A8[CtrlWordCS]=bit mask for target chip selects. */ - val = Get_NB32_DCT(dev, dct, 0xa8); - val &= ~(0xff << 8); -- val |= (0x3 << (MrsChipSel & 0xfe)) << 8; -+ val |= (0x3 << (MrsChipSel & ~0x1)) << 8; - Set_NB32_DCT(dev, dct, 0xa8, val); - - /* Resend control word 10 */ --- -1.9.1 - |