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authorFrancis Rowe <info@gluglug.org.uk>2015-10-18 19:12:53 (EDT)
committer Francis Rowe <info@gluglug.org.uk>2015-10-18 21:32:36 (EDT)
commit0622df6194dbb1b2120743c0fd1cc5e72c380128 (patch)
tree4c858b8c5667fe001a9907ae0578b4ec28a8f513 /resources/libreboot/patch/kgpe-d16/0104-amd-amdmct-mct_ddr3-Set-prefetch-double-stride-to-im.patch
parent5999dba5f71f1c05040a551d2420ab8c7f3a9da4 (diff)
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KGPE-D16: update patch set (also update coreboot and vboot)
Also contains other fixes from coreboot, like: * 551cff0 Derive lvds_dual_channel from EDID timings. ^ makes single/dual channel LVDS selection on GM45 automatic * 26fc544 lenovo/t60: Enable native intel gfx init. ^ was being maintained in libreboot, now upstreamed so not needed Framebuffer mode was disabled for the KGPE-D16, because only text-mode works at the moment.
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0104-amd-amdmct-mct_ddr3-Set-prefetch-double-stride-to-im.patch')
-rw-r--r--resources/libreboot/patch/kgpe-d16/0104-amd-amdmct-mct_ddr3-Set-prefetch-double-stride-to-im.patch27
1 files changed, 27 insertions, 0 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0104-amd-amdmct-mct_ddr3-Set-prefetch-double-stride-to-im.patch b/resources/libreboot/patch/kgpe-d16/0104-amd-amdmct-mct_ddr3-Set-prefetch-double-stride-to-im.patch
new file mode 100644
index 0000000..829e470
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0104-amd-amdmct-mct_ddr3-Set-prefetch-double-stride-to-im.patch
@@ -0,0 +1,27 @@
+From bcdb6fab80939ee9b9d599343460edcb31fd386f Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Sat, 8 Aug 2015 20:29:55 -0500
+Subject: [PATCH 104/139] amd/amdmct/mct_ddr3: Set prefetch double stride to
+ improve performance
+
+Change-Id: I34ad85388c6b71f0d44bee13afd663e0b84545cd
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+index 330f37f..de6c79c 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+@@ -5563,6 +5563,7 @@ static void mct_FinalMCT_D(struct MCTStatStruc *pMCTstat,
+ val &= ~(0x7 << 8); /* CohPrefPrbLmt = 0x1 */
+ val |= (0x1 << 8);
+ val |= (0x1 << 12); /* EnSplitDctLimits = 0x1 */
++ val |= (0x1 << 20); /* DblPrefEn = 0x1 */
+ val |= (0x7 << 22); /* PrefFourConf = 0x7 */
+ val |= (0x7 << 25); /* PrefFiveConf = 0x7 */
+ val &= ~(0xf << 28); /* DcqBwThrotWm = 0x0 */
+--
+1.9.1
+