New board: ASUS KGPE-D16

coreboot build errors:

In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0:
src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration
 static inline enum cb_err get_option(void *dest, const char *name)
                           ^
In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0:
src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here
 enum cb_err get_option(void *dest, const char *name);

Ping tpearson about this.

Also ping him about the fact that there isn't actually an option to
enable or disable native graphics initialization, but that the option
MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the
Kconfig file. I think this is probably since there isn't even an option
ROM available for the machine, so it's pointless to offer the setting.

1 files changed, 57 insertions, 0 deletions

diff --git a/resources/libreboot/patch/kgpe-d16/0039-cpu-amd-car-Add-romstage-BSP-stack-overrun-detection.patch b/resources/libreboot/patch/kgpe-d16/0039-cpu-amd-car-Add-romstage-BSP-stack-overrun-detection.patch
new file mode 100644
index 0000000..df6dee9
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0039-cpu-amd-car-Add-romstage-BSP-stack-overrun-detection.patch
@@ -0,0 +1,57 @@
+From a3709a31c062419544a607dfbca9a18773dad673 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
+Date: Mon, 1 Jun 2015 23:58:59 -0500
+Subject: [PATCH 039/146] cpu/amd/car: Add romstage BSP stack overrun
+ detection
+
+---
+ src/cpu/amd/car/cache_as_ram.inc    |    6 +++++-
+ src/cpu/amd/car/post_cache_as_ram.c |    8 ++++++++
+ 2 files changed, 13 insertions(+), 1 deletion(-)
+
+diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
+index ec70f67..9b29932 100644
+--- a/src/cpu/amd/car/cache_as_ram.inc
++++ b/src/cpu/amd/car/cache_as_ram.inc
+@@ -24,7 +24,7 @@
+ #include <cpu/amd/mtrr.h>
+ 
+ #define CacheSize		CONFIG_DCACHE_RAM_SIZE
+-#define CacheBase		(0xd0000 - CacheSize)
++#define CacheBase		CONFIG_DCACHE_RAM_BASE
+ #define CacheSizeBSPStack	CONFIG_DCACHE_BSP_STACK_SIZE
+ #define CacheSizeBSPSlush	CONFIG_DCACHE_BSP_STACK_SLUSH
+ 
+@@ -473,6 +473,10 @@ fam10_end_part1:
+ 	movl	$(CacheBase + CacheSize), %eax
+ 	movl	%eax, %esp
+ 
++	/* Poison the lower stack boundary */
++	movl	$((CacheBase + CacheSize) - CacheSizeBSPStack), %eax
++	movl	$0xdeadbeef, (%eax)
++
+ 	post_code(0xa3)
+ 
+ 	jmp	CAR_FAM10_ap_out
+diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
+index e7a41e5..b4d185e 100644
+--- a/src/cpu/amd/car/post_cache_as_ram.c
++++ b/src/cpu/amd/car/post_cache_as_ram.c
+@@ -110,6 +110,14 @@ void post_cache_as_ram(void)
+ 	void *resume_backup_memory = NULL;
+ 	uint32_t family = amd_fam1x_cpu_family();
+ 
++	/* Verify that the BSP didn't overrun the lower stack
++	 * boundary during romstage execution
++	 */
++	volatile uint32_t *lower_stack_boundary;
++	lower_stack_boundary = (void *)((CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE) - CONFIG_STACK_SIZE);
++	if ((*lower_stack_boundary) != 0xdeadbeef)
++		printk(BIOS_WARNING, "BSP overran lower stack boundary.  Undefined behaviour may result!\n");
++
+ 	struct romstage_handoff *handoff;
+ 	handoff = romstage_handoff_find_or_add();
+ 	if (handoff != NULL)
+-- 
+1.7.9.5
+