diff options
| author | Francis Rowe <info@gluglug.org.uk> | 2015-10-18 19:12:53 (EDT) |
|---|---|---|
| committer | Francis Rowe <info@gluglug.org.uk> | 2015-10-18 21:32:36 (EDT) |
| commit | 0622df6194dbb1b2120743c0fd1cc5e72c380128 (patch) | |
| tree | 4c858b8c5667fe001a9907ae0578b4ec28a8f513 /resources/libreboot/patch/kgpe-d16/0038-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch | |
| parent | 5999dba5f71f1c05040a551d2420ab8c7f3a9da4 (diff) | |
| download | libreboot-0622df6194dbb1b2120743c0fd1cc5e72c380128.zip libreboot-0622df6194dbb1b2120743c0fd1cc5e72c380128.tar.gz libreboot-0622df6194dbb1b2120743c0fd1cc5e72c380128.tar.bz2 | |
KGPE-D16: update patch set (also update coreboot and vboot)
Also contains other fixes from coreboot, like:
* 551cff0 Derive lvds_dual_channel from EDID timings.
^ makes single/dual channel LVDS selection on GM45 automatic
* 26fc544 lenovo/t60: Enable native intel gfx init.
^ was being maintained in libreboot, now upstreamed so not needed
Framebuffer mode was disabled for the KGPE-D16, because only
text-mode works at the moment.
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0038-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch')
| -rw-r--r-- | resources/libreboot/patch/kgpe-d16/0038-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0038-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch b/resources/libreboot/patch/kgpe-d16/0038-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch deleted file mode 100644 index 15adb85..0000000 --- a/resources/libreboot/patch/kgpe-d16/0038-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 59201912928ffcdbc4c7143548ceba490dea021a Mon Sep 17 00:00:00 2001 -From: Timothy Pearson <kb9vqf@pearsoncomputing.net> -Date: Mon, 1 Jun 2015 20:35:42 -0500 -Subject: [PATCH 038/146] amdmct/mct_ddr3: Disable Fam10h-specific MTRR setup - on Fam15h - ---- - src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 12 +++++++----- - 1 file changed, 7 insertions(+), 5 deletions(-) - -diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c -index c73cb26..3eb6b17 100644 ---- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c -+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c -@@ -1839,11 +1839,13 @@ static void DQSTiming_D(struct MCTStatStruc *pMCTstat, - - if (nv_DQSTrainCTL) { - mctHookBeforeAnyTraining(pMCTstat, pDCTstatA); -- /* TODO: should be in mctHookBeforeAnyTraining */ -- _WRMSR(0x26C, 0x04040404, 0x04040404); -- _WRMSR(0x26D, 0x04040404, 0x04040404); -- _WRMSR(0x26E, 0x04040404, 0x04040404); -- _WRMSR(0x26F, 0x04040404, 0x04040404); -+ if (!is_fam15h()) { -+ /* TODO: should be in mctHookBeforeAnyTraining */ -+ _WRMSR(0x26C, 0x04040404, 0x04040404); -+ _WRMSR(0x26D, 0x04040404, 0x04040404); -+ _WRMSR(0x26E, 0x04040404, 0x04040404); -+ _WRMSR(0x26F, 0x04040404, 0x04040404); -+ } - mct_WriteLevelization_HW(pMCTstat, pDCTstatA, FirstPass); - - if (is_fam15h()) { --- -1.7.9.5 - |