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authorFrancis Rowe <info@gluglug.org.uk>2016-01-30 04:58:46 (EST)
committer Francis Rowe <info@gluglug.org.uk>2016-01-30 04:58:46 (EST)
commit75ab59d4e141d106970f397c31d52ba486117fc9 (patch)
tree2c5ae2e910b590b7a8f7be16b38c431c28c23608 /resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0014-nb-amd-mct_ddr3-Add-additional-verbose-level-debug-s.patch
parenta1357659b2a72c349091a0abd7a0276b4fd6946d (diff)
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New board: ASUS KCMA-D8 desktop/workstation motherboard
Diffstat (limited to 'resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0014-nb-amd-mct_ddr3-Add-additional-verbose-level-debug-s.patch')
-rw-r--r--resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0014-nb-amd-mct_ddr3-Add-additional-verbose-level-debug-s.patch63
1 files changed, 63 insertions, 0 deletions
diff --git a/resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0014-nb-amd-mct_ddr3-Add-additional-verbose-level-debug-s.patch b/resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0014-nb-amd-mct_ddr3-Add-additional-verbose-level-debug-s.patch
new file mode 100644
index 0000000..5264c8f
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/369b561315ca68d0cdedc38208105a513c7139b5/grub/kcma-d8/0014-nb-amd-mct_ddr3-Add-additional-verbose-level-debug-s.patch
@@ -0,0 +1,63 @@
+From 99fae7d439a9eaac33ce4a4f7e9a78696dfd3547 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Tue, 24 Nov 2015 14:11:52 -0600
+Subject: [PATCH 14/45] nb/amd/mct_ddr3: Add additional verbose-level debug
+ statements
+
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c | 10 ++++++++--
+ src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c | 2 ++
+ 2 files changed, 10 insertions(+), 2 deletions(-)
+
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
+index 4cc87de..22e9836 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
+@@ -1428,8 +1428,9 @@ static uint8_t TrainDQSRdWrPos_D_Fam15(struct MCTStatStruc *pMCTstat,
+
+ if (check_antiphase == 0) {
+ /* Check for early abort before analyzing per-nibble status */
+- dword = Get_NB32_DCT(dev, dct, 0x264) & 0x1ffffff;
+- if (dword != 0) {
++ dword = Get_NB32_DCT(dev, dct, 0x264);
++ if ((dword & 0x1ffffff) != 0) {
++ print_debug_dqs("\t\t\t\t\tTrainDQSRdWrPos: 162 early abort: F2x264 ", dword, 6);
+ dqs_results_array[Receiver & 0x1][lane - lane_start][current_write_data_delay[lane] - initial_write_dqs_delay[lane]][(current_read_dqs_delay[lane] >> 1) + 16] = 0; /* Fail */
+ continue;
+ }
+@@ -1439,6 +1440,7 @@ static uint8_t TrainDQSRdWrPos_D_Fam15(struct MCTStatStruc *pMCTstat,
+ * Record pass / fail status
+ */
+ dword = Get_NB32_DCT(dev, dct, 0x268) & 0x3ffff;
++ print_debug_dqs("\t\t\t\t\tTrainDQSRdWrPos: 163 read results: F2x268 ", dword, 6);
+ if (dword & (0x3 << (lane * 2)))
+ dqs_results_array[Receiver & 0x1][lane - lane_start][current_write_data_delay[lane] - initial_write_dqs_delay[lane]][(current_read_dqs_delay[lane] >> 1) + 16] = 0; /* Fail */
+ else
+@@ -1737,6 +1739,10 @@ static void TrainDQSReceiverEnCyc_D_Fam15(struct MCTStatStruc *pMCTstat,
+ printk(BIOS_DEBUG, "TrainDQSReceiverEnCyc_D_Fam15 Receiver %d lane %d initial phy delay %04x: iterating from %04x to %04x\n", Receiver, lane, initial_phy_phase_delay[lane], rx_en_offset, 0x3ff);
+ #endif
+ for (current_phy_phase_delay[lane] = rx_en_offset; current_phy_phase_delay[lane] < 0x3ff; current_phy_phase_delay[lane] += ren_step) {
++#if DQS_TRAIN_DEBUG > 0
++ printk(BIOS_DEBUG, "%s: Receiver %d lane %d current phy delay: %04x\n", __func__, Receiver, lane, current_phy_phase_delay[lane]);
++#endif
++
+ /* 2.10.5.8.3 (4 A) */
+ write_dqs_receiver_enable_control_registers(current_phy_phase_delay, dev, dct, dimm, index_reg);
+
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
+index 1c756ab..d316d27 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
+@@ -228,6 +228,8 @@ static uint16_t fam15_receiver_enable_training_seed(struct DCTStatStruc *pDCTsta
+ }
+ }
+
++ printk(BIOS_DEBUG, "%s: using seed: %04x\n", __func__, seed);
++
+ return seed;
+ }
+
+--
+2.1.4
+