Use different coreboot revisions and patches per board

The release archives will be bigger, but this is a necessary change
that makes libreboot development easier.

At present, there are boards maintained in libreboot by different
people. By doing it this way, that becomes much easier. This is in
contrast to the present situation, where a change to one board
potentially affects all other boards, especially when updating to
a new version of coreboot.

Coreboot-libre scripts, download scripts, build scripts - everything.
The entire build system has been modified to reflect this change
of development.

For reasons of consistency, cbfstool and nvramtool are no longer
included in the util archives.

1 files changed, 70 insertions, 0 deletions

diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0134-cpu-amd-family_10h-family_15h-Apply-missing-Family-1.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0134-cpu-amd-family_10h-family_15h-Apply-missing-Family-1.patch
new file mode 100644
index 0000000..c52d584
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0134-cpu-amd-family_10h-family_15h-Apply-missing-Family-1.patch
@@ -0,0 +1,70 @@
+From 448990c014328f7e6951e3ba1c4dfab25e35e9dd Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Thu, 3 Sep 2015 17:43:52 -0500
+Subject: [PATCH 134/143] cpu/amd/family_10h-family_15h: Apply missing Family
+ 15h errata fixes
+
+Change-Id: I132874fe5b5a8b9a87422e2f07bff03bc5863ca4
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/cpu/amd/family_10h-family_15h/defaults.h |   12 ++++++++++++
+ src/northbridge/amd/amdfam10/misc_control.c  |    6 ++++++
+ 2 files changed, 18 insertions(+)
+
+diff --git a/src/cpu/amd/family_10h-family_15h/defaults.h b/src/cpu/amd/family_10h-family_15h/defaults.h
+index af59120..7a84fcb 100644
+--- a/src/cpu/amd/family_10h-family_15h/defaults.h
++++ b/src/cpu/amd/family_10h-family_15h/defaults.h
+@@ -166,6 +166,14 @@ static const struct {
+ 	  0x0000000C, 0x00000000,
+ 	  0x0000000C, 0x00000000},	/* Cx and Dx multiple-link processor */
+ 
++	{ OSVW_ID_Length, AMD_FAM15_ALL, AMD_PTYPE_ALL,
++	  0x00000005, 0x00000000,
++	  0x00000005, 0x00000000},	/* OSVW_ID_Length = 0x5 */
++
++	{ OSVW_Status, AMD_FAM15_ALL, AMD_PTYPE_ALL,
++	  0x00000010, 0x00000000,
++	  0x00000010, 0x00000000},	/* OsvwId4 = 0x1 */
++
+ 	{ BU_CFG2, AMD_DR_Dx, AMD_PTYPE_ALL,
+ 	  0x00000000, 1 << (50-32),
+ 	  0x00000000, 1 << (50-32)},	/* D0 or Above, RdMmExtCfgQwEn*/
+@@ -638,6 +646,10 @@ static const struct {
+ 	{ 3, 0x1b8, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL,
+ 	  0x00001000, 0x00001000 },	/* [12] = L3PrivReplEn */
+ 
++	/* Errata 504 workaround */
++	{ 3, 0x1b8, AMD_FAM15_ALL, AMD_PTYPE_ALL,
++	  0x00040000, 0x00040000 },	/* [18] = 1b */
++
+ 	/* IBS Control Register */
+ 	{ 3, 0x1cc, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL,
+ 	  0x00000100, 0x00000100 },	/* [8] = LvtOffsetVal */
+diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c
+index 4b62c69..a3d6b19 100644
+--- a/src/northbridge/amd/amdfam10/misc_control.c
++++ b/src/northbridge/amd/amdfam10/misc_control.c
+@@ -79,6 +79,7 @@ static void mcf3_read_resources(device_t dev)
+ 
+ static void set_agp_aperture(device_t dev, uint32_t pci_id)
+ {
++	uint32_t dword;
+ 	struct resource *resource;
+ 
+ 	resource = probe_resource(dev, 0x94);
+@@ -109,6 +110,11 @@ static void set_agp_aperture(device_t dev, uint32_t pci_id)
+ 
+ 			/* Report the resource has been stored... */
+ 			report_resource_stored(pdev, resource, " <gart>");
++
++			/* Errata 540 workaround */
++			dword = pci_read_config32(pdev, 0x90);
++			dword |= 0x1 << 6;			/* DisGartTblWlkPrb = 0x1 */
++			pci_write_config32(pdev, 0x90, dword);
+ 		}
+ 	}
+ }
+-- 
+1.7.9.5
+