Update coreboot (kgpe-d16,kcma-d8,kfsn4-dre,d510mo,ga-g41m-es2l)

Update to the latest coreboot and vboot versions at the time of writing:
coreboot 2a3434757ef425dbdfedf1fc69e1a033a6e7310d
vboot d187cd3fc792f8bcefbee4587c83eafbd08441fc

1 files changed, 0 insertions, 82 deletions

diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0117-mainboard-asus-kgpe-d16-Add-several-nvram-configurat.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0117-mainboard-asus-kgpe-d16-Add-several-nvram-configurat.patch
deleted file mode 100644
index e652fbd..0000000
--- a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0117-mainboard-asus-kgpe-d16-Add-several-nvram-configurat.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From f5f3af0a03970b6d96a0a83985ae20e242379278 Mon Sep 17 00:00:00 2001
-From: Timothy Pearson <tpearson@raptorengineeringinc.com>
-Date: Tue, 11 Aug 2015 17:53:45 -0500
-Subject: [PATCH 117/143] mainboard/asus/kgpe-d16: Add several nvram
- configuration options
-
-Change-Id: I45b04e8fbdfc65603e1057f7b0e5a13d073fe348
-Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
----
- src/mainboard/asus/kgpe-d16/cmos.default  |    3 ++-
- src/mainboard/asus/kgpe-d16/cmos.layout   |    7 ++++---
- src/mainboard/asus/kgpe-d16/devicetree.cb |    1 +
- src/mainboard/asus/kgpe-d16/romstage.c    |    2 ++
- 4 files changed, 9 insertions(+), 4 deletions(-)
-
-diff --git a/src/mainboard/asus/kgpe-d16/cmos.default b/src/mainboard/asus/kgpe-d16/cmos.default
-index 0a898bd..83c1fe8 100644
---- a/src/mainboard/asus/kgpe-d16/cmos.default
-+++ b/src/mainboard/asus/kgpe-d16/cmos.default
-@@ -3,7 +3,7 @@ debug_level = Spew
- multi_core = Enable
- slow_cpu = off
- compute_unit_siblings = Enable
--iommu = Disable
-+iommu = Enable
- nmi = Disable
- hypertransport_speed_limit = Auto
- max_mem_clock = DDR3-1600
-@@ -23,6 +23,7 @@ maximum_p_state_limit = 0xf
- probe_filter = Auto
- l3_cache_partitioning = Disable
- ieee1394 = Enable
-+gart = Disable
- experimental_memory_speed_boost = Disable
- power_on_after_fail = On
- boot_option = Fallback
-diff --git a/src/mainboard/asus/kgpe-d16/cmos.layout b/src/mainboard/asus/kgpe-d16/cmos.layout
-index 010d4db..310b7b1 100644
---- a/src/mainboard/asus/kgpe-d16/cmos.layout
-+++ b/src/mainboard/asus/kgpe-d16/cmos.layout
-@@ -51,9 +51,10 @@ entries
- 473          2       e       13       dimm_spd_checksum
- 475          1       e       14       probe_filter
- 476          1       e       1        l3_cache_partitioning
--477          1       e       1        experimental_memory_speed_boost
--478          1       r       0        allow_spd_nvram_cache_restore
--479          1       e       1        ieee1394
-+477          1       e       1        ieee1394
-+478          1       e       1        gart
-+479          1       e       1        experimental_memory_speed_boost
-+480          1       r       0        allow_spd_nvram_cache_restore
- 728        256       h       0        user_data
- 984         16       h       0        check_sum
- # Reserve the extended AMD configuration registers
-diff --git a/src/mainboard/asus/kgpe-d16/devicetree.cb b/src/mainboard/asus/kgpe-d16/devicetree.cb
-index 8eeb33e..8b35201 100644
---- a/src/mainboard/asus/kgpe-d16/devicetree.cb
-+++ b/src/mainboard/asus/kgpe-d16/devicetree.cb
-@@ -15,6 +15,7 @@ chip northbridge/amd/amdfam10/root_complex	# Root complex
- 				chip southbridge/amd/sr5650		# Primary southbridge
- 					device pci 0.0 on end			# HT Root Complex 0x9600
- 					device pci 0.1 on end			# CLKCONFIG
-+					device pci 0.2 on end			# IOMMU
- 					device pci 2.0 on			# PCIE P2P bridge 0x9603 (GPP1 Port0)
- 						# Slot				# PCI E 1 / PCI E 2
- 					end
-diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
-index 5d4005d..cbda9ca 100644
---- a/src/mainboard/asus/kgpe-d16/romstage.c
-+++ b/src/mainboard/asus/kgpe-d16/romstage.c
-@@ -459,6 +459,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
- 		die("After soft_reset_x - shouldn't see this message!!!\n");
- 	}
- 
-+	sr5650_htinit_dect_and_enable_isochronous_link();
-+
- 	/* Set default DDR memory voltage
- 	 * This will be overridden later during RAM initialization
- 	 */
--- 
-1.7.9.5
-