Use different coreboot revisions and patches per board

The release archives will be bigger, but this is a necessary change
that makes libreboot development easier.

At present, there are boards maintained in libreboot by different
people. By doing it this way, that becomes much easier. This is in
contrast to the present situation, where a change to one board
potentially affects all other boards, especially when updating to
a new version of coreboot.

Coreboot-libre scripts, download scripts, build scripts - everything.
The entire build system has been modified to reflect this change
of development.

For reasons of consistency, cbfstool and nvramtool are no longer
included in the util archives.

1 files changed, 66 insertions, 0 deletions

diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0109-cpu-amd-family_10h-family_15h-Set-up-SRI-to-XCS-Toke.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0109-cpu-amd-family_10h-family_15h-Set-up-SRI-to-XCS-Toke.patch
new file mode 100644
index 0000000..79e297e
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0109-cpu-amd-family_10h-family_15h-Set-up-SRI-to-XCS-Toke.patch
@@ -0,0 +1,66 @@
+From 6e4bf582d1d1cf515f1dec738e02bb7e123ac227 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Sat, 8 Aug 2015 22:14:59 -0500
+Subject: [PATCH 109/143] cpu/amd/family_10h-family_15h: Set up SRI to XCS
+ Token Count registers on Family 15h
+
+Change-Id: Ic992efad11d8e231ec85c793cf1e478bea0b9d3e
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/cpu/amd/family_10h-family_15h/init_cpus.c |   40 +++++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
+index 59d745d..f4254f0 100644
+--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
++++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
+@@ -1643,6 +1643,46 @@ static void cpuSetAMDPCI(u8 node)
+ 				pci_write_config32(NODE_PCI(node, 3), (link << 2) + 0x148, dword);
+ 			}
+ 		}
++
++		/* Set up the SRI to XCS Token Count */
++		uint8_t free_tok;
++		uint8_t up_rsp_tok;
++
++		/* Set defaults */
++		free_tok = 0xa;
++		up_rsp_tok = 0x3;
++
++		if (!dual_node) {
++			free_tok = 0xa;
++			up_rsp_tok = 0x3;
++		} else {
++			if ((sockets == 1)
++				|| ((sockets == 2) && (sockets_populated == 1))) {
++				if (probe_filter_enabled) {
++					free_tok = 0x9;
++					up_rsp_tok = 0x3;
++				} else {
++					free_tok = 0xa;
++					up_rsp_tok = 0x3;
++				}
++			} else if ((sockets == 2) && (sockets_populated == 2)) {
++				free_tok = 0xb;
++				up_rsp_tok = 0x1;
++			} else if ((sockets == 4) && (sockets_populated == 2)) {
++				free_tok = 0xa;
++				up_rsp_tok = 0x3;
++			} else if ((sockets == 4) && (sockets_populated == 4)) {
++				free_tok = 0x9;
++				up_rsp_tok = 0x1;
++			}
++		}
++
++		dword = pci_read_config32(NODE_PCI(node, 3), 0x140);
++		dword &= ~(0xf << 20);			/* FreeTok = free_tok */
++		dword |= ((free_tok & 0xf) << 20);
++		dword &= ~(0x3 << 8);			/* UpRspTok = up_rsp_tok */
++		dword |= ((up_rsp_tok & 0x3) << 8);
++		pci_write_config32(NODE_PCI(node, 3), 0x140, dword);
+ 	}
+ 
+ 	printk(BIOS_DEBUG, " done\n");
+-- 
+1.7.9.5
+