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| author | Francis Rowe <info@gluglug.org.uk> | 2016-03-08 01:00:09 (EST) |
|---|---|---|
| committer | Francis Rowe <info@gluglug.org.uk> | 2016-03-08 02:32:32 (EST) |
| commit | dfa21bb8ee01eac21a2acee79011a634cb67e373 (patch) | |
| tree | 21cd4f855aa03db13abba91400ad3be212b11602 /resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0087-northbridge-amd-amdmct-Reduce-maximum-number-of-DDR3.patch | |
| parent | 2e5e505da125f9d90dd63c1cbcb08bf5316b21ae (diff) | |
| download | libreboot-dfa21bb8ee01eac21a2acee79011a634cb67e373.zip libreboot-dfa21bb8ee01eac21a2acee79011a634cb67e373.tar.gz libreboot-dfa21bb8ee01eac21a2acee79011a634cb67e373.tar.bz2 | |
Update coreboot (kgpe-d16,kcma-d8,kfsn4-dre,d510mo,ga-g41m-es2l)
Update to the latest coreboot and vboot versions at the time of writing:
coreboot 2a3434757ef425dbdfedf1fc69e1a033a6e7310d
vboot d187cd3fc792f8bcefbee4587c83eafbd08441fc
Diffstat (limited to 'resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0087-northbridge-amd-amdmct-Reduce-maximum-number-of-DDR3.patch')
| -rw-r--r-- | resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0087-northbridge-amd-amdmct-Reduce-maximum-number-of-DDR3.patch | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0087-northbridge-amd-amdmct-Reduce-maximum-number-of-DDR3.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0087-northbridge-amd-amdmct-Reduce-maximum-number-of-DDR3.patch deleted file mode 100644 index 08333f6..0000000 --- a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0087-northbridge-amd-amdmct-Reduce-maximum-number-of-DDR3.patch +++ /dev/null @@ -1,41 +0,0 @@ -From e262fc3ee190bafb58adfab926cc24ff9cbd239c Mon Sep 17 00:00:00 2001 -From: Timothy Pearson <tpearson@raptorengineeringinc.com> -Date: Tue, 20 Oct 2015 21:32:09 -0500 -Subject: [PATCH 087/143] northbridge/amd/amdmct: Reduce maximum number of - DDR3 DIMMs - -CAR space on certain platforms is nearly full. This prevents the -addition of necessary RAM initialization features such as x4 DIMM -support. As the DIMM SPD cache uses a sizeable amount of CAR RAM, -reducing it would free up a significant amount of CAR RAM. - -DDR3-based AMD platforms only support up to 3 physical DIMMs on -each channel (6 per node). Reduce the maximum number of DIMMs -on a node from 8 to 6 accordingly. - -Change-Id: I38def86da76fc622785318c825670209b2ac9017 -Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> ---- - src/northbridge/amd/amdmct/wrappers/mcti.h | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - -diff --git a/src/northbridge/amd/amdmct/wrappers/mcti.h b/src/northbridge/amd/amdmct/wrappers/mcti.h -index 2aba377..ef6e3dc 100644 ---- a/src/northbridge/amd/amdmct/wrappers/mcti.h -+++ b/src/northbridge/amd/amdmct/wrappers/mcti.h -@@ -51,7 +51,11 @@ UPDATE AS NEEDED - #endif - - #ifndef MAX_DIMMS_SUPPORTED --#define MAX_DIMMS_SUPPORTED 8 -+#if IS_ENABLED(CONFIG_DIMM_DDR3) -+ #define MAX_DIMMS_SUPPORTED 6 -+#else -+ #define MAX_DIMMS_SUPPORTED 8 -+#endif - #endif - - #ifndef MAX_CS_SUPPORTED --- -1.7.9.5 - |