Use different coreboot revisions and patches per board

The release archives will be bigger, but this is a necessary change
that makes libreboot development easier.

At present, there are boards maintained in libreboot by different
people. By doing it this way, that becomes much easier. This is in
contrast to the present situation, where a change to one board
potentially affects all other boards, especially when updating to
a new version of coreboot.

Coreboot-libre scripts, download scripts, build scripts - everything.
The entire build system has been modified to reflect this change
of development.

For reasons of consistency, cbfstool and nvramtool are no longer
included in the util archives.

1 files changed, 120 insertions, 0 deletions

diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0072-northbridge-amd-amdfam10-Properly-indicate-node-and-.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0072-northbridge-amd-amdfam10-Properly-indicate-node-and-.patch
new file mode 100644
index 0000000..4b628b1
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0072-northbridge-amd-amdfam10-Properly-indicate-node-and-.patch
@@ -0,0 +1,120 @@
+From a00183866e0083ead7735ef5dcb974a98cd0de98 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Thu, 25 Jun 2015 15:28:23 -0500
+Subject: [PATCH 072/143] northbridge/amd/amdfam10: Properly indicate node and
+ channel in SMBIOS tables
+
+Change-Id: Ie7278745358daf0c78cdb9c579db5291a1a2a0cb
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/northbridge/amd/amdfam10/northbridge.c  |    7 ++++++-
+ src/northbridge/amd/amdmct/mct/mct_d.c      |   12 ++++++++++++
+ src/northbridge/amd/amdmct/mct/mct_d.h      |    7 +++++--
+ src/northbridge/amd/amdmct/mct_ddr3/mct_d.c |   12 ++++++++++++
+ src/northbridge/amd/amdmct/mct_ddr3/mct_d.h |    8 +++++---
+ 5 files changed, 40 insertions(+), 6 deletions(-)
+
+diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
+index 9fe0ccb..52b5ffb 100644
+--- a/src/northbridge/amd/amdfam10/northbridge.c
++++ b/src/northbridge/amd/amdfam10/northbridge.c
+@@ -1207,7 +1207,12 @@ static int amdfam10_get_smbios_data17(int* count, int handle, int parent_handle,
+ 				t->attributes = 0;
+ 				t->attributes |= ranks & 0xf;	/* rank number is stored in the lowest 4 bits of the attributes field */
+ 				t->form_factor = MEMORY_FORMFACTOR_DIMM;
+-				snprintf(string_buffer, sizeof (string_buffer), "NODE %d DIMM_%s%d", node, (slot & 0x1)?"B":"A", (slot >> 1) + 1);
++				if (mem_info->dct_stat[node].Dual_Node_Package) {
++					snprintf(string_buffer, sizeof (string_buffer), "NODE %d DIMM_%s%d", node >> 1,
++						(mem_info->dct_stat[node].Internal_Node_ID)?((slot & 0x1)?"D":"C"):((slot & 0x1)?"B":"A"), (slot >> 1) + 1);
++				} else {
++					snprintf(string_buffer, sizeof (string_buffer), "NODE %d DIMM_%s%d", node, (slot & 0x1)?"B":"A", (slot >> 1) + 1);
++				}
+ 				t->device_locator = smbios_add_string(t->eos, string_buffer);
+ 				if (IS_ENABLED(CONFIG_DIMM_DDR2))
+ 					t->memory_type = MEMORY_TYPE_DDR2;
+diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
+index be0af65..c805d41 100644
+--- a/src/northbridge/amd/amdmct/mct/mct_d.c
++++ b/src/northbridge/amd/amdmct/mct/mct_d.c
+@@ -236,6 +236,18 @@ restartinit:
+ 		pDCTstat->dev_nbmisc = PA_NBMISC(Node);
+ 		pDCTstat->NodeSysBase = node_sys_base;
+ 
++		if (mctGet_NVbits(NV_PACK_TYPE) == PT_GR) {
++			uint32_t dword;
++			pDCTstat->Dual_Node_Package = 1;
++
++			/* Get the internal node number */
++			dword = Get_NB32(pDCTstat->dev_nbmisc, 0xe8);
++			dword = (dword >> 30) & 0x3;
++			pDCTstat->Internal_Node_ID = dword;
++		} else {
++			pDCTstat->Dual_Node_Package = 0;
++		}
++
+ 		print_tx("mctAutoInitMCT_D: mct_init Node ", Node);
+ 		mct_init(pMCTstat, pDCTstat);
+ 		mctNodeIDDebugPort_D();
+diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h
+index 6b6194d..7569300 100644
+--- a/src/northbridge/amd/amdmct/mct/mct_d.h
++++ b/src/northbridge/amd/amdmct/mct/mct_d.h
+@@ -291,8 +291,11 @@ struct MCTStatStruc {
+ 
+ struct DCTStatStruc {		/* A per Node structure*/
+ /* DCTStatStruct_F -  start */
+-	u8 Node_ID;		/* Node ID of current controller*/
+-	u8 ErrCode;		/* Current error condition of Node
++	u8 Node_ID;			/* Node ID of current controller*/
++	uint8_t Internal_Node_ID;	/* Internal Node ID of the current controller */
++	uint8_t Dual_Node_Package;	/* 1=Dual node package (G34) */
++	uint8_t stopDCT;		/* Set if the DCT will be stopped */
++	u8 ErrCode;			/* Current error condition of Node
+ 		0= no error
+ 		1= Variance Error, DCT is running but not in an optimal configuration.
+ 		2= Stop Error, DCT is NOT running
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+index dda997e..571e18d 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+@@ -1389,6 +1389,18 @@ restartinit:
+ 			pDCTstat->dev_nbctl = PA_NBCTL(Node);
+ 			pDCTstat->NodeSysBase = node_sys_base;
+ 
++			if (mctGet_NVbits(NV_PACK_TYPE) == PT_GR) {
++				uint32_t dword;
++				pDCTstat->Dual_Node_Package = 1;
++
++				/* Get the internal node number */
++				dword = Get_NB32(pDCTstat->dev_nbmisc, 0xe8);
++				dword = (dword >> 30) & 0x3;
++				pDCTstat->Internal_Node_ID = dword;
++			} else {
++				pDCTstat->Dual_Node_Package = 0;
++			}
++
+ 			printk(BIOS_DEBUG, "mctAutoInitMCT_D: mct_init Node %d\n", Node);
+ 			mct_init(pMCTstat, pDCTstat);
+ 			mctNodeIDDebugPort_D();
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h
+index ac8c934..8c9da47 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h
+@@ -335,9 +335,11 @@ struct amd_spd_node_data {
+ 
+ struct DCTStatStruc {		/* A per Node structure*/
+ /* DCTStatStruct_F -  start */
+-	u8 Node_ID;		/* Node ID of current controller */
+-	uint8_t stopDCT;	/* Set if the DCT will be stopped */
+-	u8 ErrCode;		/* Current error condition of Node
++	u8 Node_ID;			/* Node ID of current controller */
++	uint8_t Internal_Node_ID;	/* Internal Node ID of the current controller */
++	uint8_t Dual_Node_Package;	/* 1=Dual node package (G34) */
++	uint8_t stopDCT;		/* Set if the DCT will be stopped */
++	u8 ErrCode;			/* Current error condition of Node
+ 		0= no error
+ 		1= Variance Error, DCT is running but not in an optimal configuration.
+ 		2= Stop Error, DCT is NOT running
+-- 
+1.7.9.5
+