Use different coreboot revisions and patches per board

The release archives will be bigger, but this is a necessary change
that makes libreboot development easier.

At present, there are boards maintained in libreboot by different
people. By doing it this way, that becomes much easier. This is in
contrast to the present situation, where a change to one board
potentially affects all other boards, especially when updating to
a new version of coreboot.

Coreboot-libre scripts, download scripts, build scripts - everything.
The entire build system has been modified to reflect this change
of development.

For reasons of consistency, cbfstool and nvramtool are no longer
included in the util archives.

1 files changed, 84 insertions, 0 deletions

diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0053-northbridge-amd-amdfam10-Add-ability-to-set-maximum-.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0053-northbridge-amd-amdfam10-Add-ability-to-set-maximum-.patch
new file mode 100644
index 0000000..7f45663
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0053-northbridge-amd-amdfam10-Add-ability-to-set-maximum-.patch
@@ -0,0 +1,84 @@
+From 1103d319eede186dc340a9c1701432f3ff33c468 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Wed, 10 Jun 2015 00:35:05 -0500
+Subject: [PATCH 053/143] northbridge/amd/amdfam10: Add ability to set maximum
+ P-state limit
+
+Change-Id: Ifdbb1ad11a856f855c59702ae0ee99e95b08520e
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/mainboard/asus/kgpe-d16/cmos.default    |    1 +
+ src/mainboard/asus/kgpe-d16/cmos.layout     |    3 ++-
+ src/northbridge/amd/amdfam10/misc_control.c |   24 ++++++++++++++++++++----
+ 3 files changed, 23 insertions(+), 5 deletions(-)
+
+diff --git a/src/mainboard/asus/kgpe-d16/cmos.default b/src/mainboard/asus/kgpe-d16/cmos.default
+index 5bfaadd..a52b7fa 100644
+--- a/src/mainboard/asus/kgpe-d16/cmos.default
++++ b/src/mainboard/asus/kgpe-d16/cmos.default
+@@ -17,6 +17,7 @@ interleave_memory_channels = Enable
+ cpu_c_states = Enable
+ cpu_cc6_state = Enable
+ sata_ahci_mode = Enable
++maximum_p_state_limit = 0xf
+ ieee1394 = Enable
+ power_on_after_fail = On
+ boot_option = Fallback
+diff --git a/src/mainboard/asus/kgpe-d16/cmos.layout b/src/mainboard/asus/kgpe-d16/cmos.layout
+index 247fd7b..307bddc 100644
+--- a/src/mainboard/asus/kgpe-d16/cmos.layout
++++ b/src/mainboard/asus/kgpe-d16/cmos.layout
+@@ -46,7 +46,8 @@ entries
+ 465          1       e       1        cpu_c_states
+ 466          1       e       1        cpu_cc6_state
+ 467          1       e       1        sata_ahci_mode
+-468          1       r       0        allow_spd_nvram_cache_restore
++468          4       h       0        maximum_p_state_limit
++473          1       r       0        allow_spd_nvram_cache_restore
+ 477          1       e       1        ieee1394
+ 728        256       h       0        user_data
+ 984         16       h       0        check_sum
+diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c
+index 8777e8f..703ae51 100644
+--- a/src/northbridge/amd/amdfam10/misc_control.c
++++ b/src/northbridge/amd/amdfam10/misc_control.c
+@@ -124,16 +124,32 @@ static void mcf3_set_resources(device_t dev)
+ 
+ static void misc_control_init(struct device *dev)
+ {
+-	u32 cmd;
++	uint32_t dword;
++	uint8_t nvram;
++	uint8_t boost_limit;
++	uint8_t current_boost;
+ 
+ 	printk(BIOS_DEBUG, "NB: Function 3 Misc Control.. ");
+ 
+ 	/* Disable Machine checks from Invalid Locations.
+ 	 * This is needed for PC backwards compatibility.
+ 	 */
+-	cmd = pci_read_config32(dev, 0x44);
+-	cmd |= (1<<6) | (1<<25);
+-	pci_write_config32(dev, 0x44, cmd );
++	dword = pci_read_config32(dev, 0x44);
++	dword |= (1<<6) | (1<<25);
++	pci_write_config32(dev, 0x44, dword);
++
++	boost_limit = 0xf;
++	if (get_option(&nvram, "maximum_p_state_limit") == CB_SUCCESS)
++		boost_limit = nvram & 0xf;
++
++	/* Set P-state maximum value */
++	dword = pci_read_config32(dev, 0xdc);
++	current_boost = (dword >> 8) & 0x7;
++	if (boost_limit > current_boost)
++		boost_limit = current_boost;
++	dword &= ~(0x7 << 8);
++	dword |= (boost_limit & 0x7) << 8;
++	pci_write_config32(dev, 0xdc, dword);
+ 
+ 	printk(BIOS_DEBUG, "done.\n");
+ }
+-- 
+1.7.9.5
+