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authorFrancis Rowe <info@gluglug.org.uk>2016-01-02 17:10:32 (EST)
committer Francis Rowe <info@gluglug.org.uk>2016-01-04 15:28:39 (EST)
commitd1f408f3725aa02bc1d76c4c6aadb4697bd073c0 (patch)
tree7eed036543ae1f8c57b56825880a722a8efbedf1 /resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0052-southbridge-amd-sb700-Indicate-iSATA-eSATA-port-type.patch
parent91aec7e72005dcda72d19f2d024a02d8c0f86590 (diff)
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Use different coreboot revisions and patches per board
The release archives will be bigger, but this is a necessary change that makes libreboot development easier. At present, there are boards maintained in libreboot by different people. By doing it this way, that becomes much easier. This is in contrast to the present situation, where a change to one board potentially affects all other boards, especially when updating to a new version of coreboot. Coreboot-libre scripts, download scripts, build scripts - everything. The entire build system has been modified to reflect this change of development. For reasons of consistency, cbfstool and nvramtool are no longer included in the util archives.
Diffstat (limited to 'resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0052-southbridge-amd-sb700-Indicate-iSATA-eSATA-port-type.patch')
-rw-r--r--resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0052-southbridge-amd-sb700-Indicate-iSATA-eSATA-port-type.patch94
1 files changed, 94 insertions, 0 deletions
diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0052-southbridge-amd-sb700-Indicate-iSATA-eSATA-port-type.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0052-southbridge-amd-sb700-Indicate-iSATA-eSATA-port-type.patch
new file mode 100644
index 0000000..a53e25e
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0052-southbridge-amd-sb700-Indicate-iSATA-eSATA-port-type.patch
@@ -0,0 +1,94 @@
+From 0092df93ab131ead3c4f738e35a8371c603f9f83 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Tue, 9 Jun 2015 19:34:16 -0500
+Subject: [PATCH 052/143] southbridge/amd/sb700: Indicate iSATA/eSATA port
+ type
+
+Change-Id: I8ee757d07c82c151b36def6b709163ff144d244f
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/mainboard/asus/kgpe-d16/mainboard.c | 16 ++++++++++++++++
+ src/southbridge/amd/sb700/sata.c | 19 +++++++++++++++++++
+ src/southbridge/amd/sb700/sb700.h | 1 +
+ 3 files changed, 36 insertions(+)
+
+diff --git a/src/mainboard/asus/kgpe-d16/mainboard.c b/src/mainboard/asus/kgpe-d16/mainboard.c
+index 8de6f26..77e55db 100644
+--- a/src/mainboard/asus/kgpe-d16/mainboard.c
++++ b/src/mainboard/asus/kgpe-d16/mainboard.c
+@@ -99,6 +99,22 @@ void sb7xx_51xx_setup_sata_phys(struct device *dev)
+ pci_write_config16(dev, 0xaa, 0xa07a);
+ }
+
++/* override the default SATA port setup */
++void sb7xx_51xx_setup_sata_port_indication(void *sata_bar5)
++{
++ uint32_t dword;
++
++ /* RPR7.9 Program Port Indication Registers */
++ dword = read32(sata_bar5 + 0xf8);
++ dword &= ~(0x3f << 12); /* All ports are iSATA */
++ dword &= ~0x3f;
++ write32(sata_bar5 + 0xf8, dword);
++
++ dword = read32(sata_bar5 + 0xfc);
++ dword &= ~(0x1 << 20); /* No eSATA ports are present */
++ write32(sata_bar5 + 0xfc, dword);
++}
++
+ struct chip_operations mainboard_ops = {
+ .enable_dev = mainboard_enable,
+ };
+diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c
+index d97288a..d35f84d 100644
+--- a/src/southbridge/amd/sb700/sata.c
++++ b/src/southbridge/amd/sb700/sata.c
+@@ -78,6 +78,23 @@ void __attribute__((weak)) sb7xx_51xx_setup_sata_phys(struct device *dev)
+ pci_write_config16(dev, 0xaa, 0xA07A);
+ }
+
++/* This function can be overloaded in mainboard.c */
++void __attribute__((weak)) sb7xx_51xx_setup_sata_port_indication(void *sata_bar5)
++{
++ uint32_t dword;
++
++ /* RPR7.9 Program Port Indication Registers */
++ dword = read32(sata_bar5 + 0xf8);
++ dword &= ~(0x3f << 12); /* Ports 0 and 1 are eSATA */
++ dword |= (0x3 << 12);
++ dword &= ~0x3f;
++ write32(sata_bar5 + 0xf8, dword);
++
++ dword = read32(sata_bar5 + 0xfc);
++ dword |= 0x1 << 20; /* At least one eSATA port is present */
++ write32(sata_bar5 + 0xfc, dword);
++}
++
+ static void sata_init(struct device *dev)
+ {
+ u8 byte;
+@@ -248,7 +265,9 @@ static void sata_init(struct device *dev)
+ /* Program the watchdog counter to 0x10 */
+ byte = 0x10;
+ pci_write_config8(dev, 0x46, byte);
++
+ sb7xx_51xx_setup_sata_phys(dev);
++ sb7xx_51xx_setup_sata_port_indication(sata_bar5);
+
+ /* Enable the I/O, MM, BusMaster access for SATA */
+ byte = pci_read_config8(dev, 0x4);
+diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h
+index 941a4fd..8f792e7 100644
+--- a/src/southbridge/amd/sb700/sb700.h
++++ b/src/southbridge/amd/sb700/sb700.h
+@@ -74,6 +74,7 @@ void sb7xx_51xx_before_pci_init(void);
+ #include <device/pci.h>
+ /* allow override in mainboard.c */
+ void sb7xx_51xx_setup_sata_phys(struct device *dev);
++void sb7xx_51xx_setup_sata_port_indication(void *sata_bar5);
+
+ #endif
+
+--
+1.7.9.5
+