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authorFrancis Rowe <info@gluglug.org.uk>2016-01-02 17:10:32 (EST)
committer Francis Rowe <info@gluglug.org.uk>2016-01-04 15:28:39 (EST)
commitd1f408f3725aa02bc1d76c4c6aadb4697bd073c0 (patch)
tree7eed036543ae1f8c57b56825880a722a8efbedf1 /resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0037-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch
parent91aec7e72005dcda72d19f2d024a02d8c0f86590 (diff)
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Use different coreboot revisions and patches per board
The release archives will be bigger, but this is a necessary change that makes libreboot development easier. At present, there are boards maintained in libreboot by different people. By doing it this way, that becomes much easier. This is in contrast to the present situation, where a change to one board potentially affects all other boards, especially when updating to a new version of coreboot. Coreboot-libre scripts, download scripts, build scripts - everything. The entire build system has been modified to reflect this change of development. For reasons of consistency, cbfstool and nvramtool are no longer included in the util archives.
Diffstat (limited to 'resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0037-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch')
-rw-r--r--resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0037-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch38
1 files changed, 38 insertions, 0 deletions
diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0037-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0037-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch
new file mode 100644
index 0000000..96e544c
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0037-amdmct-mct_ddr3-Disable-Fam10h-specific-MTRR-setup-o.patch
@@ -0,0 +1,38 @@
+From c24f0d24c3957484dafd1d2b91fd1b1a43060c7d Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Mon, 1 Jun 2015 20:35:42 -0500
+Subject: [PATCH 037/143] amdmct/mct_ddr3: Disable Fam10h-specific MTRR setup
+ on Fam15h
+
+Change-Id: I5c12b5ef8564402601634e9f3528bbf9303e0b33
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 12 +++++++-----
+ 1 file changed, 7 insertions(+), 5 deletions(-)
+
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+index 74066b1..4677c73 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+@@ -1842,11 +1842,13 @@ static void DQSTiming_D(struct MCTStatStruc *pMCTstat,
+
+ if (nv_DQSTrainCTL) {
+ mctHookBeforeAnyTraining(pMCTstat, pDCTstatA);
+- /* TODO: should be in mctHookBeforeAnyTraining */
+- _WRMSR(0x26C, 0x04040404, 0x04040404);
+- _WRMSR(0x26D, 0x04040404, 0x04040404);
+- _WRMSR(0x26E, 0x04040404, 0x04040404);
+- _WRMSR(0x26F, 0x04040404, 0x04040404);
++ if (!is_fam15h()) {
++ /* TODO: should be in mctHookBeforeAnyTraining */
++ _WRMSR(0x26C, 0x04040404, 0x04040404);
++ _WRMSR(0x26D, 0x04040404, 0x04040404);
++ _WRMSR(0x26E, 0x04040404, 0x04040404);
++ _WRMSR(0x26F, 0x04040404, 0x04040404);
++ }
+ mct_WriteLevelization_HW(pMCTstat, pDCTstatA, FirstPass);
+
+ if (is_fam15h()) {
+--
+1.7.9.5
+