Use different coreboot revisions and patches per board

The release archives will be bigger, but this is a necessary change
that makes libreboot development easier.

At present, there are boards maintained in libreboot by different
people. By doing it this way, that becomes much easier. This is in
contrast to the present situation, where a change to one board
potentially affects all other boards, especially when updating to
a new version of coreboot.

Coreboot-libre scripts, download scripts, build scripts - everything.
The entire build system has been modified to reflect this change
of development.

For reasons of consistency, cbfstool and nvramtool are no longer
included in the util archives.

1 files changed, 56 insertions, 0 deletions

diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0022-cpu-amd-car-Add-initial-Suspend-to-RAM-S3-support.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0022-cpu-amd-car-Add-initial-Suspend-to-RAM-S3-support.patch
new file mode 100644
index 0000000..3afb5d5
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0022-cpu-amd-car-Add-initial-Suspend-to-RAM-S3-support.patch
@@ -0,0 +1,56 @@
+From 9731b8e1e997c083bb2084085fb6d4c46d96910f Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Sat, 5 Sep 2015 18:46:24 -0500
+Subject: [PATCH 022/143] cpu/amd/car: Add initial Suspend to RAM (S3) support
+
+Change-Id: I1e1a67fa3c2c13cebcf8f0af318055b9d97d0a59
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/cpu/amd/car/post_cache_as_ram.c |   12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
+index 230d1aa..e265de1 100644
+--- a/src/cpu/amd/car/post_cache_as_ram.c
++++ b/src/cpu/amd/car/post_cache_as_ram.c
+@@ -1,4 +1,5 @@
+ /* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
++ * Copyright (C) 2012 ChromeOS Authors
+  * 2005.6 by yhlu
+  * 2006.3 yhlu add copy data from CAR to ram
+  */
+@@ -9,6 +10,7 @@
+ #include <cpu/amd/mtrr.h>
+ #include <cpu/amd/car.h>
+ #include <arch/acpi.h>
++#include <romstage_handoff.h>
+ #include "cbmem.h"
+ #include "cpu/amd/car/disable_cache_as_ram.c"
+ 
+@@ -103,6 +105,13 @@ void post_cache_as_ram(void)
+ {
+ 	void *resume_backup_memory = NULL;
+ 
++	struct romstage_handoff *handoff;
++	handoff = romstage_handoff_find_or_add();
++	if (handoff != NULL)
++		handoff->s3_resume = acpi_is_wakeup_s3();
++	else
++		printk(BIOS_DEBUG, "Romstage handoff structure not added!\n");
++
+ 	int s3resume = acpi_is_wakeup_s3();
+ 	if (s3resume) {
+ 		cbmem_recovery(s3resume);
+@@ -150,6 +159,9 @@ void cache_as_ram_new_stack (void)
+ 
+ 	if (acpi_is_wakeup_s3()) {
+ 		resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
++#if PRINTK_IN_CAR
++		printk(BIOS_DEBUG, "Resume backup memory location: %p\n", resume_backup_memory);
++#endif
+ 	}
+ 	prepare_ramstage_region(resume_backup_memory);
+ 
+-- 
+1.7.9.5
+