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authorFrancis Rowe <info@gluglug.org.uk>2016-01-02 17:10:32 (EST)
committer Francis Rowe <info@gluglug.org.uk>2016-01-04 15:28:39 (EST)
commitd1f408f3725aa02bc1d76c4c6aadb4697bd073c0 (patch)
tree7eed036543ae1f8c57b56825880a722a8efbedf1 /resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0005-mainboard-Update-mainboards-using-the-w83795-sensor-.patch
parent91aec7e72005dcda72d19f2d024a02d8c0f86590 (diff)
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Use different coreboot revisions and patches per board
The release archives will be bigger, but this is a necessary change that makes libreboot development easier. At present, there are boards maintained in libreboot by different people. By doing it this way, that becomes much easier. This is in contrast to the present situation, where a change to one board potentially affects all other boards, especially when updating to a new version of coreboot. Coreboot-libre scripts, download scripts, build scripts - everything. The entire build system has been modified to reflect this change of development. For reasons of consistency, cbfstool and nvramtool are no longer included in the util archives.
Diffstat (limited to 'resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0005-mainboard-Update-mainboards-using-the-w83795-sensor-.patch')
-rw-r--r--resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0005-mainboard-Update-mainboards-using-the-w83795-sensor-.patch323
1 files changed, 323 insertions, 0 deletions
diff --git a/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0005-mainboard-Update-mainboards-using-the-w83795-sensor-.patch b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0005-mainboard-Update-mainboards-using-the-w83795-sensor-.patch
new file mode 100644
index 0000000..e848f49
--- /dev/null
+++ b/resources/libreboot/patch/coreboot/33fb4cf0ffb01be8bcb6b488872c87eb50e7d77f/grub/kgpe-d16/0005-mainboard-Update-mainboards-using-the-w83795-sensor-.patch
@@ -0,0 +1,323 @@
+From 2b9d5ca0b29cbe6e1600879b5cc731c2c4cb106d Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <tpearson@raptorengineeringinc.com>
+Date: Thu, 22 Oct 2015 02:53:39 -0500
+Subject: [PATCH 005/143] mainboard: Update mainboards using the w83795 sensor
+ device
+
+Update mainboards using the w83795 sensor device with sane default
+values. Note that in some cases the defaults may vary from the
+defaults provided by the old driver, for example the default fan
+speeds and control modes have changed as I do not have any information
+on the correct sensor to fan mappings for these boards.
+
+Change-Id: Id2ad6222d7a0f29483b022fa097d7d098c6b4122
+Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
+---
+ src/mainboard/supermicro/h8qgi/devicetree.cb | 89 ++++++++++++++++++++++++++
+ src/mainboard/supermicro/h8scm/devicetree.cb | 89 ++++++++++++++++++++++++++
+ src/mainboard/tyan/s8226/devicetree.cb | 89 ++++++++++++++++++++++++++
+ 3 files changed, 267 insertions(+)
+
+diff --git a/src/mainboard/supermicro/h8qgi/devicetree.cb b/src/mainboard/supermicro/h8qgi/devicetree.cb
+index 59740c9..6c3ee90 100644
+--- a/src/mainboard/supermicro/h8qgi/devicetree.cb
++++ b/src/mainboard/supermicro/h8qgi/devicetree.cb
+@@ -107,6 +107,95 @@ chip northbridge/amd/agesa/family15/root_complex
+ end
+ end #superio/winbond/w83627dhg
+ chip drivers/i2c/w83795
++ register "fanin_ctl1" = "0xff" # Enable monitoring of FANIN1 - FANIN8
++ register "fanin_ctl2" = "0x00" # Connect FANIN11 - FANIN14 to alternate functions
++ register "temp_ctl1" = "0x2a" # Enable monitoring of DTS, VSEN12, and VSEN13
++ register "temp_ctl2" = "0x01" # Enable monitoring of TD1/TR1
++ register "temp_dtse" = "0x03" # Enable DTS1 and DTS2
++ register "volt_ctl1" = "0xff" # Enable monitoring of VSEN1 - VSEN8
++ register "volt_ctl2" = "0xf7" # Enable monitoring of VSEN9 - VSEN11, 3VDD, 3VSB, and VBAT
++ register "temp1_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp1)
++ register "temp2_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp2)
++ register "temp3_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp3)
++ register "temp4_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp4)
++ register "temp5_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp5)
++ register "temp6_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp6)
++ register "temp1_source_select" = "0x00" # Use TD1/TR1 as data source for Temp1
++ register "temp2_source_select" = "0x00" # Use TD2/TR2 as data source for Temp2
++ register "temp3_source_select" = "0x00" # Use TD3/TR3 as data source for Temp3
++ register "temp4_source_select" = "0x00" # Use TD4/TR4 as data source for Temp4
++ register "temp5_source_select" = "0x00" # Use TR5 as data source for Temp5
++ register "temp6_source_select" = "0x00" # Use TR6 as data source for Temp6
++ register "tr1_critical_temperature" = "85" # Set TD1/TR1 critical temperature to 85°C
++ register "tr1_critical_hysteresis" = "80" # Set TD1/TR1 critical hysteresis temperature to 80°C
++ register "tr1_warning_temperature" = "70" # Set TD1/TR1 warning temperature to 70°C
++ register "tr1_warning_hysteresis" = "65" # Set TD1/TR1 warning hysteresis temperature to 65°C
++ register "dts_critical_temperature" = "85" # Set DTS (CPU) critical temperature to 85°C
++ register "dts_critical_hysteresis" = "80" # Set DTS (CPU) critical hysteresis temperature to 80°C
++ register "dts_warning_temperature" = "70" # Set DTS (CPU) warning temperature to 70°C
++ register "dts_warning_hysteresis" = "65" # Set DTS (CPU) warning hysteresis temperature to 65°C
++ register "temp1_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp2_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp3_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp4_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp5_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp6_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp1_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp2_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp3_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp4_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp5_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp6_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "fan1_nonstop" = "7" # Set Fan 1 minimum speed
++ register "fan2_nonstop" = "7" # Set Fan 2 minimum speed
++ register "fan3_nonstop" = "7" # Set Fan 3 minimum speed
++ register "fan4_nonstop" = "7" # Set Fan 4 minimum speed
++ register "fan5_nonstop" = "7" # Set Fan 5 minimum speed
++ register "fan6_nonstop" = "7" # Set Fan 6 minimum speed
++ register "fan7_nonstop" = "7" # Set Fan 7 minimum speed
++ register "fan8_nonstop" = "7" # Set Fan 8 minimum speed
++ register "default_speed" = "100" # All fans to full speed on power up
++ register "fan1_duty" = "100" # Fan 1 to full speed
++ register "fan2_duty" = "100" # Fan 2 to full speed
++ register "fan3_duty" = "100" # Fan 3 to full speed
++ register "fan4_duty" = "100" # Fan 4 to full speed
++ register "fan5_duty" = "100" # Fan 5 to full speed
++ register "fan6_duty" = "100" # Fan 6 to full speed
++ register "fan7_duty" = "100" # Fan 7 to full speed
++ register "fan8_duty" = "100" # Fan 8 to full speed
++ register "vcore1_high_limit_mv" = "1500" # VCORE1 (Node 0) high limit to 1.5V
++ register "vcore1_low_limit_mv" = "900" # VCORE1 (Node 0) low limit to 0.9V
++ register "vcore2_high_limit_mv" = "1500" # VCORE2 (Node 1) high limit to 1.5V
++ register "vcore2_low_limit_mv" = "900" # VCORE2 (Node 1) low limit to 0.9V
++ register "vsen3_high_limit_mv" = "1600" # VSEN1 (Node 0 RAM voltage) high limit to 1.6V
++ register "vsen3_low_limit_mv" = "1100" # VSEN1 (Node 0 RAM voltage) low limit to 1.1V
++ register "vsen4_high_limit_mv" = "1600" # VSEN2 (Node 1 RAM voltage) high limit to 1.6V
++ register "vsen4_low_limit_mv" = "1100" # VSEN2 (Node 1 RAM voltage) low limit to 1.1V
++ register "vsen5_high_limit_mv" = "1250" # VSEN5 (Node 0 HT link voltage) high limit to 1.25V
++ register "vsen5_low_limit_mv" = "1150" # VSEN5 (Node 0 HT link voltage) low limit to 1.15V
++ register "vsen6_high_limit_mv" = "1250" # VSEN6 (Node 1 HT link voltage) high limit to 1.25V
++ register "vsen6_low_limit_mv" = "1150" # VSEN6 (Node 1 HT link voltage) low limit to 1.15V
++ register "vsen7_high_limit_mv" = "1150" # VSEN7 (Northbridge core voltage) high limit to 1.15V
++ register "vsen7_low_limit_mv" = "1050" # VSEN7 (Northbridge core voltage) low limit to 1.05V
++ register "vsen8_high_limit_mv" = "1900" # VSEN8 (+1.8V) high limit to 1.9V
++ register "vsen8_low_limit_mv" = "1700" # VSEN8 (+1.8V) low limit to 1.7V
++ register "vsen9_high_limit_mv" = "1250" # VSEN9 (+1.2V) high limit to 1.25V
++ register "vsen9_low_limit_mv" = "1150" # VSEN9 (+1.2V) low limit to 1.15V
++ register "vsen10_high_limit_mv" = "1150" # VSEN10 (+1.1V) high limit to 1.15V
++ register "vsen10_low_limit_mv" = "1050" # VSEN10 (+1.1V) low limit to 1.05V
++ register "vsen11_high_limit_mv" = "1625" # VSEN11 (5VSB, scaling factor ~3.2) high limit to 5.2V
++ register "vsen11_low_limit_mv" = "1500" # VSEN11 (5VSB, scaling factor ~3.2) low limit to 4.8V
++ register "vsen12_high_limit_mv" = "1083" # VSEN12 (+12V, scaling factor ~12) high limit to 13V
++ register "vsen12_low_limit_mv" = "917" # VSEN12 (+12V, scaling factor ~12) low limit to 11V
++ register "vsen13_high_limit_mv" = "1625" # VSEN13 (+5V, scaling factor ~3.2) high limit to 5.2V
++ register "vsen13_low_limit_mv" = "1500" # VSEN13 (+5V, scaling factor ~3.2) low limit to 4.8V
++ register "vdd_high_limit_mv" = "3500" # 3VDD high limit to 3.5V
++ register "vdd_low_limit_mv" = "3100" # 3VDD low limit to 3.1V
++ register "vsb_high_limit_mv" = "3500" # 3VSB high limit to 3.5V
++ register "vsb_low_limit_mv" = "3100" # 3VSB low limit to 3.1V
++ register "vbat_high_limit_mv" = "3500" # VBAT (+3V) high limit to 3.5V
++ register "vbat_low_limit_mv" = "2500" # VBAT (+3V) low limit to 2.5V
++ register "smbus_aux" = "0" # Device located on primary SMBUS
+ device pnp 5e on #hwm
+ end
+ end #drivers/i2c/w83795
+diff --git a/src/mainboard/supermicro/h8scm/devicetree.cb b/src/mainboard/supermicro/h8scm/devicetree.cb
+index b8fb823..a280e62 100644
+--- a/src/mainboard/supermicro/h8scm/devicetree.cb
++++ b/src/mainboard/supermicro/h8scm/devicetree.cb
+@@ -106,6 +106,95 @@ chip northbridge/amd/agesa/family15/root_complex
+ end
+ end #superio/winbond/w83627dhg
+ chip drivers/i2c/w83795
++ register "fanin_ctl1" = "0xff" # Enable monitoring of FANIN1 - FANIN8
++ register "fanin_ctl2" = "0x00" # Connect FANIN11 - FANIN14 to alternate functions
++ register "temp_ctl1" = "0x2a" # Enable monitoring of DTS, VSEN12, and VSEN13
++ register "temp_ctl2" = "0x01" # Enable monitoring of TD1/TR1
++ register "temp_dtse" = "0x03" # Enable DTS1 and DTS2
++ register "volt_ctl1" = "0xff" # Enable monitoring of VSEN1 - VSEN8
++ register "volt_ctl2" = "0xf7" # Enable monitoring of VSEN9 - VSEN11, 3VDD, 3VSB, and VBAT
++ register "temp1_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp1)
++ register "temp2_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp2)
++ register "temp3_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp3)
++ register "temp4_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp4)
++ register "temp5_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp5)
++ register "temp6_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp6)
++ register "temp1_source_select" = "0x00" # Use TD1/TR1 as data source for Temp1
++ register "temp2_source_select" = "0x00" # Use TD2/TR2 as data source for Temp2
++ register "temp3_source_select" = "0x00" # Use TD3/TR3 as data source for Temp3
++ register "temp4_source_select" = "0x00" # Use TD4/TR4 as data source for Temp4
++ register "temp5_source_select" = "0x00" # Use TR5 as data source for Temp5
++ register "temp6_source_select" = "0x00" # Use TR6 as data source for Temp6
++ register "tr1_critical_temperature" = "85" # Set TD1/TR1 critical temperature to 85°C
++ register "tr1_critical_hysteresis" = "80" # Set TD1/TR1 critical hysteresis temperature to 80°C
++ register "tr1_warning_temperature" = "70" # Set TD1/TR1 warning temperature to 70°C
++ register "tr1_warning_hysteresis" = "65" # Set TD1/TR1 warning hysteresis temperature to 65°C
++ register "dts_critical_temperature" = "85" # Set DTS (CPU) critical temperature to 85°C
++ register "dts_critical_hysteresis" = "80" # Set DTS (CPU) critical hysteresis temperature to 80°C
++ register "dts_warning_temperature" = "70" # Set DTS (CPU) warning temperature to 70°C
++ register "dts_warning_hysteresis" = "65" # Set DTS (CPU) warning hysteresis temperature to 65°C
++ register "temp1_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp2_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp3_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp4_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp5_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp6_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp1_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp2_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp3_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp4_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp5_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp6_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "fan1_nonstop" = "7" # Set Fan 1 minimum speed
++ register "fan2_nonstop" = "7" # Set Fan 2 minimum speed
++ register "fan3_nonstop" = "7" # Set Fan 3 minimum speed
++ register "fan4_nonstop" = "7" # Set Fan 4 minimum speed
++ register "fan5_nonstop" = "7" # Set Fan 5 minimum speed
++ register "fan6_nonstop" = "7" # Set Fan 6 minimum speed
++ register "fan7_nonstop" = "7" # Set Fan 7 minimum speed
++ register "fan8_nonstop" = "7" # Set Fan 8 minimum speed
++ register "default_speed" = "100" # All fans to full speed on power up
++ register "fan1_duty" = "100" # Fan 1 to full speed
++ register "fan2_duty" = "100" # Fan 2 to full speed
++ register "fan3_duty" = "100" # Fan 3 to full speed
++ register "fan4_duty" = "100" # Fan 4 to full speed
++ register "fan5_duty" = "100" # Fan 5 to full speed
++ register "fan6_duty" = "100" # Fan 6 to full speed
++ register "fan7_duty" = "100" # Fan 7 to full speed
++ register "fan8_duty" = "100" # Fan 8 to full speed
++ register "vcore1_high_limit_mv" = "1500" # VCORE1 (Node 0) high limit to 1.5V
++ register "vcore1_low_limit_mv" = "900" # VCORE1 (Node 0) low limit to 0.9V
++ register "vcore2_high_limit_mv" = "1500" # VCORE2 (Node 1) high limit to 1.5V
++ register "vcore2_low_limit_mv" = "900" # VCORE2 (Node 1) low limit to 0.9V
++ register "vsen3_high_limit_mv" = "1600" # VSEN1 (Node 0 RAM voltage) high limit to 1.6V
++ register "vsen3_low_limit_mv" = "1100" # VSEN1 (Node 0 RAM voltage) low limit to 1.1V
++ register "vsen4_high_limit_mv" = "1600" # VSEN2 (Node 1 RAM voltage) high limit to 1.6V
++ register "vsen4_low_limit_mv" = "1100" # VSEN2 (Node 1 RAM voltage) low limit to 1.1V
++ register "vsen5_high_limit_mv" = "1250" # VSEN5 (Node 0 HT link voltage) high limit to 1.25V
++ register "vsen5_low_limit_mv" = "1150" # VSEN5 (Node 0 HT link voltage) low limit to 1.15V
++ register "vsen6_high_limit_mv" = "1250" # VSEN6 (Node 1 HT link voltage) high limit to 1.25V
++ register "vsen6_low_limit_mv" = "1150" # VSEN6 (Node 1 HT link voltage) low limit to 1.15V
++ register "vsen7_high_limit_mv" = "1150" # VSEN7 (Northbridge core voltage) high limit to 1.15V
++ register "vsen7_low_limit_mv" = "1050" # VSEN7 (Northbridge core voltage) low limit to 1.05V
++ register "vsen8_high_limit_mv" = "1900" # VSEN8 (+1.8V) high limit to 1.9V
++ register "vsen8_low_limit_mv" = "1700" # VSEN8 (+1.8V) low limit to 1.7V
++ register "vsen9_high_limit_mv" = "1250" # VSEN9 (+1.2V) high limit to 1.25V
++ register "vsen9_low_limit_mv" = "1150" # VSEN9 (+1.2V) low limit to 1.15V
++ register "vsen10_high_limit_mv" = "1150" # VSEN10 (+1.1V) high limit to 1.15V
++ register "vsen10_low_limit_mv" = "1050" # VSEN10 (+1.1V) low limit to 1.05V
++ register "vsen11_high_limit_mv" = "1625" # VSEN11 (5VSB, scaling factor ~3.2) high limit to 5.2V
++ register "vsen11_low_limit_mv" = "1500" # VSEN11 (5VSB, scaling factor ~3.2) low limit to 4.8V
++ register "vsen12_high_limit_mv" = "1083" # VSEN12 (+12V, scaling factor ~12) high limit to 13V
++ register "vsen12_low_limit_mv" = "917" # VSEN12 (+12V, scaling factor ~12) low limit to 11V
++ register "vsen13_high_limit_mv" = "1625" # VSEN13 (+5V, scaling factor ~3.2) high limit to 5.2V
++ register "vsen13_low_limit_mv" = "1500" # VSEN13 (+5V, scaling factor ~3.2) low limit to 4.8V
++ register "vdd_high_limit_mv" = "3500" # 3VDD high limit to 3.5V
++ register "vdd_low_limit_mv" = "3100" # 3VDD low limit to 3.1V
++ register "vsb_high_limit_mv" = "3500" # 3VSB high limit to 3.5V
++ register "vsb_low_limit_mv" = "3100" # 3VSB low limit to 3.1V
++ register "vbat_high_limit_mv" = "3500" # VBAT (+3V) high limit to 3.5V
++ register "vbat_low_limit_mv" = "2500" # VBAT (+3V) low limit to 2.5V
++ register "smbus_aux" = "0" # Device located on primary SMBUS
+ device pnp 5e on #hwm
+ end
+ end #drivers/i2c/w83795
+diff --git a/src/mainboard/tyan/s8226/devicetree.cb b/src/mainboard/tyan/s8226/devicetree.cb
+index 64701a5..9f5e584 100644
+--- a/src/mainboard/tyan/s8226/devicetree.cb
++++ b/src/mainboard/tyan/s8226/devicetree.cb
+@@ -106,6 +106,95 @@ chip northbridge/amd/agesa/family15/root_complex
+ end
+ end #superio/winbond/w83627dhg
+ chip drivers/i2c/w83795
++ register "fanin_ctl1" = "0xff" # Enable monitoring of FANIN1 - FANIN8
++ register "fanin_ctl2" = "0x00" # Connect FANIN11 - FANIN14 to alternate functions
++ register "temp_ctl1" = "0x2a" # Enable monitoring of DTS, VSEN12, and VSEN13
++ register "temp_ctl2" = "0x01" # Enable monitoring of TD1/TR1
++ register "temp_dtse" = "0x03" # Enable DTS1 and DTS2
++ register "volt_ctl1" = "0xff" # Enable monitoring of VSEN1 - VSEN8
++ register "volt_ctl2" = "0xf7" # Enable monitoring of VSEN9 - VSEN11, 3VDD, 3VSB, and VBAT
++ register "temp1_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp1)
++ register "temp2_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp2)
++ register "temp3_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp3)
++ register "temp4_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp4)
++ register "temp5_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp5)
++ register "temp6_fan_select" = "0x00" # All fans to manual mode (no dependence on Temp6)
++ register "temp1_source_select" = "0x00" # Use TD1/TR1 as data source for Temp1
++ register "temp2_source_select" = "0x00" # Use TD2/TR2 as data source for Temp2
++ register "temp3_source_select" = "0x00" # Use TD3/TR3 as data source for Temp3
++ register "temp4_source_select" = "0x00" # Use TD4/TR4 as data source for Temp4
++ register "temp5_source_select" = "0x00" # Use TR5 as data source for Temp5
++ register "temp6_source_select" = "0x00" # Use TR6 as data source for Temp6
++ register "tr1_critical_temperature" = "85" # Set TD1/TR1 critical temperature to 85°C
++ register "tr1_critical_hysteresis" = "80" # Set TD1/TR1 critical hysteresis temperature to 80°C
++ register "tr1_warning_temperature" = "70" # Set TD1/TR1 warning temperature to 70°C
++ register "tr1_warning_hysteresis" = "65" # Set TD1/TR1 warning hysteresis temperature to 65°C
++ register "dts_critical_temperature" = "85" # Set DTS (CPU) critical temperature to 85°C
++ register "dts_critical_hysteresis" = "80" # Set DTS (CPU) critical hysteresis temperature to 80°C
++ register "dts_warning_temperature" = "70" # Set DTS (CPU) warning temperature to 70°C
++ register "dts_warning_hysteresis" = "65" # Set DTS (CPU) warning hysteresis temperature to 65°C
++ register "temp1_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp2_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp3_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp4_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp5_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp6_critical_temperature" = "80" # Set Temp1 critical temperature to 80°C
++ register "temp1_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp2_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp3_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp4_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp5_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "temp6_target_temperature" = "80" # Set Temp1 target temperature to 80°C
++ register "fan1_nonstop" = "7" # Set Fan 1 minimum speed
++ register "fan2_nonstop" = "7" # Set Fan 2 minimum speed
++ register "fan3_nonstop" = "7" # Set Fan 3 minimum speed
++ register "fan4_nonstop" = "7" # Set Fan 4 minimum speed
++ register "fan5_nonstop" = "7" # Set Fan 5 minimum speed
++ register "fan6_nonstop" = "7" # Set Fan 6 minimum speed
++ register "fan7_nonstop" = "7" # Set Fan 7 minimum speed
++ register "fan8_nonstop" = "7" # Set Fan 8 minimum speed
++ register "default_speed" = "100" # All fans to full speed on power up
++ register "fan1_duty" = "100" # Fan 1 to full speed
++ register "fan2_duty" = "100" # Fan 2 to full speed
++ register "fan3_duty" = "100" # Fan 3 to full speed
++ register "fan4_duty" = "100" # Fan 4 to full speed
++ register "fan5_duty" = "100" # Fan 5 to full speed
++ register "fan6_duty" = "100" # Fan 6 to full speed
++ register "fan7_duty" = "100" # Fan 7 to full speed
++ register "fan8_duty" = "100" # Fan 8 to full speed
++ register "vcore1_high_limit_mv" = "1500" # VCORE1 (Node 0) high limit to 1.5V
++ register "vcore1_low_limit_mv" = "900" # VCORE1 (Node 0) low limit to 0.9V
++ register "vcore2_high_limit_mv" = "1500" # VCORE2 (Node 1) high limit to 1.5V
++ register "vcore2_low_limit_mv" = "900" # VCORE2 (Node 1) low limit to 0.9V
++ register "vsen3_high_limit_mv" = "1600" # VSEN1 (Node 0 RAM voltage) high limit to 1.6V
++ register "vsen3_low_limit_mv" = "1100" # VSEN1 (Node 0 RAM voltage) low limit to 1.1V
++ register "vsen4_high_limit_mv" = "1600" # VSEN2 (Node 1 RAM voltage) high limit to 1.6V
++ register "vsen4_low_limit_mv" = "1100" # VSEN2 (Node 1 RAM voltage) low limit to 1.1V
++ register "vsen5_high_limit_mv" = "1250" # VSEN5 (Node 0 HT link voltage) high limit to 1.25V
++ register "vsen5_low_limit_mv" = "1150" # VSEN5 (Node 0 HT link voltage) low limit to 1.15V
++ register "vsen6_high_limit_mv" = "1250" # VSEN6 (Node 1 HT link voltage) high limit to 1.25V
++ register "vsen6_low_limit_mv" = "1150" # VSEN6 (Node 1 HT link voltage) low limit to 1.15V
++ register "vsen7_high_limit_mv" = "1150" # VSEN7 (Northbridge core voltage) high limit to 1.15V
++ register "vsen7_low_limit_mv" = "1050" # VSEN7 (Northbridge core voltage) low limit to 1.05V
++ register "vsen8_high_limit_mv" = "1900" # VSEN8 (+1.8V) high limit to 1.9V
++ register "vsen8_low_limit_mv" = "1700" # VSEN8 (+1.8V) low limit to 1.7V
++ register "vsen9_high_limit_mv" = "1250" # VSEN9 (+1.2V) high limit to 1.25V
++ register "vsen9_low_limit_mv" = "1150" # VSEN9 (+1.2V) low limit to 1.15V
++ register "vsen10_high_limit_mv" = "1150" # VSEN10 (+1.1V) high limit to 1.15V
++ register "vsen10_low_limit_mv" = "1050" # VSEN10 (+1.1V) low limit to 1.05V
++ register "vsen11_high_limit_mv" = "1625" # VSEN11 (5VSB, scaling factor ~3.2) high limit to 5.2V
++ register "vsen11_low_limit_mv" = "1500" # VSEN11 (5VSB, scaling factor ~3.2) low limit to 4.8V
++ register "vsen12_high_limit_mv" = "1083" # VSEN12 (+12V, scaling factor ~12) high limit to 13V
++ register "vsen12_low_limit_mv" = "917" # VSEN12 (+12V, scaling factor ~12) low limit to 11V
++ register "vsen13_high_limit_mv" = "1625" # VSEN13 (+5V, scaling factor ~3.2) high limit to 5.2V
++ register "vsen13_low_limit_mv" = "1500" # VSEN13 (+5V, scaling factor ~3.2) low limit to 4.8V
++ register "vdd_high_limit_mv" = "3500" # 3VDD high limit to 3.5V
++ register "vdd_low_limit_mv" = "3100" # 3VDD low limit to 3.1V
++ register "vsb_high_limit_mv" = "3500" # 3VSB high limit to 3.5V
++ register "vsb_low_limit_mv" = "3100" # 3VSB low limit to 3.1V
++ register "vbat_high_limit_mv" = "3500" # VBAT (+3V) high limit to 3.5V
++ register "vbat_low_limit_mv" = "2500" # VBAT (+3V) low limit to 2.5V
++ register "smbus_aux" = "0" # Device located on primary SMBUS
+ device pnp 5e on #hwm
+ end
+ end #drivers/i2c/w83795
+--
+1.7.9.5
+