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author | Francis Rowe <info@gluglug.org.uk> | 2015-06-15 15:15:36 (EDT) |
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committer | Francis Rowe <info@gluglug.org.uk> | 2015-06-15 23:36:26 (EDT) |
commit | bd95009839337576c1d7ac6d022228c4ec4248a5 (patch) | |
tree | 29622510346a315c5cb0fd766ac883147f3b4b15 /resources/libreboot/patch/0005-mainboard-lenovo-x200-Use-defines-from-southbridge-f.patch | |
parent | 9f8eced929a99b2ad7b10d1b8d237779afdd98d5 (diff) | |
download | libreboot-bd95009839337576c1d7ac6d022228c4ec4248a5.zip libreboot-bd95009839337576c1d7ac6d022228c4ec4248a5.tar.gz libreboot-bd95009839337576c1d7ac6d022228c4ec4248a5.tar.bz2 |
Update coreboot-libre
Rebase all patches. Remove the ones that are no longer needed.
More CPU microcode updates were moved to coreboot's 3rdparty
repository, so there are less blobs for libreboot to delete
now (because the 3rdparty repository is not checked out in
libreboot).
Correct HDA verbs used for T400 (also R400, T500) (patch is in
coreboot, merged).
Diffstat (limited to 'resources/libreboot/patch/0005-mainboard-lenovo-x200-Use-defines-from-southbridge-f.patch')
-rw-r--r-- | resources/libreboot/patch/0005-mainboard-lenovo-x200-Use-defines-from-southbridge-f.patch | 49 |
1 files changed, 0 insertions, 49 deletions
diff --git a/resources/libreboot/patch/0005-mainboard-lenovo-x200-Use-defines-from-southbridge-f.patch b/resources/libreboot/patch/0005-mainboard-lenovo-x200-Use-defines-from-southbridge-f.patch deleted file mode 100644 index 1c659e8..0000000 --- a/resources/libreboot/patch/0005-mainboard-lenovo-x200-Use-defines-from-southbridge-f.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 654222e8ccc7bf3e7d222a16aaeb3d5e2846b0d9 Mon Sep 17 00:00:00 2001 -From: Timothy Pearson <tpearson@raptorengineeringinc.com> -Date: Mon, 6 Apr 2015 03:41:28 -0500 -Subject: [PATCH 05/22] mainboard/lenovo/x200: Use defines from southbridge for - GPIO config - -Change-Id: I9f65922d0785e06a173221b3262e73b575087dfd -Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> ---- - src/mainboard/lenovo/x200/romstage.c | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - -diff --git a/src/mainboard/lenovo/x200/romstage.c b/src/mainboard/lenovo/x200/romstage.c -index f232642..5f50f32 100644 ---- a/src/mainboard/lenovo/x200/romstage.c -+++ b/src/mainboard/lenovo/x200/romstage.c -@@ -40,21 +40,21 @@ - - static void default_southbridge_gpio_setup(void) - { -- outl(0x197e23fe, DEFAULT_GPIOBASE + 0x00); -- outl(0xe1a66dfe, DEFAULT_GPIOBASE + 0x04); -- outl(0xe3faef3f, DEFAULT_GPIOBASE + 0x0c); -+ outl(0x197e23fe, DEFAULT_GPIOBASE + GP_IO_USE_SEL); -+ outl(0xe1a66dfe, DEFAULT_GPIOBASE + GP_IO_SEL); -+ outl(0xe3faef3f, DEFAULT_GPIOBASE + GP_LVL); - - /* Disable blink [31:0]. */ -- outl(0x00000000, DEFAULT_GPIOBASE + 0x18); -+ outl(0x00000000, DEFAULT_GPIOBASE + GPO_BLINK); - /* Set input inversion [31:0]. */ -- outl(0x00000102, DEFAULT_GPIOBASE + 0x2c); -+ outl(0x00000102, DEFAULT_GPIOBASE + GPI_INV); - - /* Enable GPIOs [60:32]. */ -- outl(0x030306f6, DEFAULT_GPIOBASE + 0x30); -+ outl(0x030306f6, DEFAULT_GPIOBASE + GP_IO_USE_SEL2); - /* Set input/output mode [60:32] (0 == out, 1 == in). */ -- outl(0x1f55f9f1, DEFAULT_GPIOBASE + 0x34); -+ outl(0x1f55f9f1, DEFAULT_GPIOBASE + GP_IO_SEL2); - /* Set gpio levels [60:32]. */ -- outl(0x1dffff53, DEFAULT_GPIOBASE + 0x38); -+ outl(0x1dffff53, DEFAULT_GPIOBASE + GP_LVL2); - } - - static void early_lpc_setup(void) --- -1.9.1 - |