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authorPaul Kocialkowski <contact@paulk.fr>2015-10-11 11:48:46 (EDT)
committer Francis Rowe <info@gluglug.org.uk>2015-10-11 15:16:26 (EDT)
commitd8b597f33e75d04b84be7c9d7081a3b97821617d (patch)
tree8ad2d64ba4dff4cb6cfc1d9f7ecdc2c9cda8d19c /resources/depthcharge/patch/0001-arm-armv7-a-march-abi-flag-for-ARMv7-hardware.patch
parentd6b6b1ea62f555f38152ab475d98c57f739f8b8d (diff)
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Chromebook C201 (codename veyron_speedy) support
This introduces Libreboot support for the Asus Chromebook C201 (codename veyron_speedy). At this point, this produces a standalone Libreboot image that can be flashed to the RO Coreboot partition of the SPI flash, as well as the Libreboot version that can be flash to the RO Firmware ID partition. Libreboot on the Chromebook C201 uses the depthcharge bootloader, modified to display text messages instead of ChromeOS bitmaps (that encourage the use of ChromeOS). For convenience, an installation script, chromebook-flash-replace, is provided along with a description of the flash layout, to ease the replacement of the Coreboot and RO Firmware ID partitions on the full SPI flash image. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Diffstat (limited to 'resources/depthcharge/patch/0001-arm-armv7-a-march-abi-flag-for-ARMv7-hardware.patch')
-rw-r--r--resources/depthcharge/patch/0001-arm-armv7-a-march-abi-flag-for-ARMv7-hardware.patch30
1 files changed, 30 insertions, 0 deletions
diff --git a/resources/depthcharge/patch/0001-arm-armv7-a-march-abi-flag-for-ARMv7-hardware.patch b/resources/depthcharge/patch/0001-arm-armv7-a-march-abi-flag-for-ARMv7-hardware.patch
new file mode 100644
index 0000000..f295a63
--- /dev/null
+++ b/resources/depthcharge/patch/0001-arm-armv7-a-march-abi-flag-for-ARMv7-hardware.patch
@@ -0,0 +1,30 @@
+From 095ae6281bb2d5bdab288fa042e5c4daa05c5ca3 Mon Sep 17 00:00:00 2001
+From: Paul Kocialkowski <contact@paulk.fr>
+Date: Mon, 3 Aug 2015 14:39:42 +0200
+Subject: [PATCH 1/7] arm: armv7-a march abi flag for ARMv7 hardware
+
+Specifying the march is required to get depthcharge to build with e.g. the arm
+toolchain built by coreboot's crossgcc script. Without this flag, the toolchain
+will complain that some ARM mrc/mcr ASM instructions are not defined.
+
+Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
+---
+ src/arch/arm/build_vars | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/arch/arm/build_vars b/src/arch/arm/build_vars
+index b2fce32..455e370 100644
+--- a/src/arch/arm/build_vars
++++ b/src/arch/arm/build_vars
+@@ -17,7 +17,7 @@
+
+ VB_FIRMWARE_ARCH=arm
+ ifeq ($(CONFIG_ARCH_ARM_V7),y)
+-ARCH_ABI_FLAGS += -mthumb
++ARCH_ABI_FLAGS += -mthumb -march=armv7-a
+ endif
+
+ ifeq ($(CONFIG_ARCH_ARM_V8),y)
+--
+1.9.1
+