summaryrefslogtreecommitdiffstats
path: root/docs/tasks.html
diff options
context:
space:
mode:
authorFrancis Rowe <info@gluglug.org.uk>2015-04-29 20:23:38 (EDT)
committer Francis Rowe <info@gluglug.org.uk>2015-04-29 20:23:38 (EDT)
commitc8ec82439b2597a463fcb71a7bc1f197420dff41 (patch)
tree549ef34071a9ada2e623c37c3831cdd913bd54d4 /docs/tasks.html
parent1cdf6cd7893e49eb3453ea56e53ba4ec86aacef2 (diff)
downloadlibreboot-c8ec82439b2597a463fcb71a7bc1f197420dff41.zip
libreboot-c8ec82439b2597a463fcb71a7bc1f197420dff41.tar.gz
libreboot-c8ec82439b2597a463fcb71a7bc1f197420dff41.tar.bz2
docs/tasks.html: fix errors
Diffstat (limited to 'docs/tasks.html')
-rw-r--r--docs/tasks.html9
1 files changed, 7 insertions, 2 deletions
diff --git a/docs/tasks.html b/docs/tasks.html
index 96495d2..cf4d0b6 100644
--- a/docs/tasks.html
+++ b/docs/tasks.html
@@ -48,8 +48,11 @@
<li>
<b><i><u>HIGH PRIORITY!</u></i></b> ASUS KFSN4-DRE - fam10h, already in coreboot, seems to have native graphics initialization already,
CPUs probably work without microcode updates, looks like this can already run blob-free.
- NOTE: PLCC flash chip (see vultureprog. BBB might be possible, it has GPIO pins etc) - not sure
- if software flashing is possible for initial install.
+ NOTE: PLCC flash chip (see vultureprog. BBB might be possible, it has GPIO pins etc) -
+ external flashing not required. Flashing internally from stock firmware works.
+ Recommendation: boot with proprietary firmware, dump it, hot-swap the chip and copy the dump to the new chip.
+ Do this a few times. Now you have a backup. Then flash coreboot/libreboot. No external programmer needed
+ (not even for brick recovery, since you backed it up onto spare flash chips).
</li>
<li>
<b><u><i>HIGH PRIORITY!</i></u></b> ASUS KGPE-D16 - ported by <a href="http://raptorengineeringinc.com/content/base/main.htm">Raptor Engineering Inc.</a> (USA).
@@ -59,6 +62,8 @@
<b>Crowd funding will be necessary!</b>
See <a href="http://www.coreboot.org/pipermail/coreboot/2015-April/079773.html">this thread</a>
on the coreboot mailing list.
+ - note: external flashing required for initial install (internal flashing works with coreboot/libreboot running).
+ It uses a DIP-8 (socket) SPI flash chip, so it's easy to flash.
</li>
<li>
<b><i><u>HIGH PRIORITY!</u></i></b> F2A85-M and E350M1 (libreboot_*_headless.rom). Test openatom (video BIOS replacement). SMU firmware is a problem. XHCI firmware is a problem.