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author | Leah Woods <info@minifree.org> | 2015-07-18 19:31:16 (EDT) |
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committer | Leah Woods <info@minifree.org> | 2016-05-18 10:15:26 (EDT) |
commit | 12e695ec7b160b1cc62831838244454b7edd03d3 (patch) | |
tree | 7821900fe16ece180a021957371a7c0b798922dd /docs/install | |
parent | 919af0e6b7cbff2171d370a0b830f2b9d740410b (diff) | |
download | libreboot-12e695ec7b160b1cc62831838244454b7edd03d3.zip libreboot-12e695ec7b160b1cc62831838244454b7edd03d3.tar.gz libreboot-12e695ec7b160b1cc62831838244454b7edd03d3.tar.bz2 |
New board: ThinkPad R500 (experimental)r500-experimental
The ich9deblob and ich9gen utilities were modified, so that they
support reading and/or writing descriptor images where the GbE
region is not defined. These utilities were also re-factored
and tidied up a bit.
A quick was noticed during the course of this work, in that
Compenent 1 Density was being set to 8MiB constantly, even
on systems with 4MiB flash chips. Component 2 Density was
set statically to 2MiB. ich9gen now sets both to 4MiB or 8MiB,
depending on whether building the descriptor for a 4MiB or
8MiB ROM image.
There are still some ACPI bugs (see docs/hcl/r500.html), which
will have to be fixed upstream. TODO: get hw reg dumps from
a factory R500, and compare with the X200 or T400 dumps.
Diffstat (limited to 'docs/install')
35 files changed, 492 insertions, 2 deletions
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diff --git a/docs/install/images/r500/0031.JPG b/docs/install/images/r500/0031.JPG Binary files differnew file mode 100644 index 0000000..2770a51 --- /dev/null +++ b/docs/install/images/r500/0031.JPG diff --git a/docs/install/images/r500/0032.JPG b/docs/install/images/r500/0032.JPG Binary files differnew file mode 100644 index 0000000..bde624c --- /dev/null +++ b/docs/install/images/r500/0032.JPG diff --git a/docs/install/images/r500/flashchip.jpg b/docs/install/images/r500/flashchip.jpg Binary files differnew file mode 100644 index 0000000..f26b5ce --- /dev/null +++ b/docs/install/images/r500/flashchip.jpg diff --git a/docs/install/index.html b/docs/install/index.html index 56d5048..b0df387 100644 --- a/docs/install/index.html +++ b/docs/install/index.html @@ -45,6 +45,7 @@ <li><a href="t60_unbrick.html">ThinkPad T60: Recovery guide</a></li> <li><a href="x200_external.html">ThinkPad X200/X200S/X200T (needed if running the proprietary firmware, or to unbrick)</a></li> <li><a href="r400_external.html">ThinkPad R400 (needed if running the proprietary firmware, or to unbrick)</a></li> + <li><a href="r500_external.html">ThinkPad R500 (needed if running the proprietary firmware, or to unbrick)</a></li> <li><a href="t400_external.html">ThinkPad T400 (needed if running the proprietary firmware, or to unbrick)</a></li> <li><a href="t500_external.html">ThinkPad T500 (needed if running the proprietary firmware, or to unbrick)</a></li> </ul> @@ -142,6 +143,7 @@ <p> X200 users, refer to <a href="x200_external.html">x200_external.html</a>, R400 users refer to <a href="r400_external.html">r400_external.html</a>, + R500 users refer to <a href="r500_external.html">r500_external.html</a>, T400 users refer to <a href="t400_external.html">t400_external.html</a>, T500 users refer to <a href="t500_external.html">t500_external.html</a> </p> @@ -194,7 +196,7 @@ </p> <p> Similarly, it is possible to write-protect the flash chip in coreboot or libreboot on GM45 laptops - (X200/R400/T400/T500). If you did this, then you will need to use the links above for flashing, + (X200/R400/R500/T400/T500). If you did this, then you will need to use the links above for flashing, treating your laptop as though it currently has the proprietary firmware (because write-protected SPI flash requires external re-flashing, as is also the case when running the proprietary firmware). </p> @@ -222,7 +224,15 @@ and assuming that your current firmware has the correct MAC address in it, you can get it from your OS. </p> - <h2>Flash chip size on GM45 (X200/R400/T400/T500)</h2> + <p> + <b> + R500 users: your laptop lacks a GbE region, because it has a different NIC. You do not need to change the MAC + address on this laptop; it will already be correct. You can simply flash the available ROM images for the R500, as-is. + See <a href="../hcl/r500.html#nogbe">../hcl/r500.html#nogbe</a>. + </b> + </p> + + <h2>Flash chip size</h2> <p> Use this to find out:<br/> diff --git a/docs/install/r500_external.html b/docs/install/r500_external.html new file mode 100644 index 0000000..0360c09 --- /dev/null +++ b/docs/install/r500_external.html @@ -0,0 +1,480 @@ +<!DOCTYPE html> +<html> +<head> + <meta charset="utf-8"> + <meta name="viewport" content="width=device-width, initial-scale=1"> + + <style type="text/css"> + @import url('../css/main.css'); + </style> + + <title>ThinkPad R500: flashing tutorial (BeagleBone Black)</title> +</head> + +<body> + + <div class="section"> + <h1 id="pagetop">Flashing the R500 with a BeagleBone Black</h1> + <p>Initial flashing instructions for R500.</p> + <p> + This guide is for those who want libreboot on their ThinkPad R500 + while they still have the original Lenovo BIOS present. This guide + can also be followed (adapted) if you brick your R500, to know how + to recover. + </p> + <p> + Before following this section, please make sure to setup your libreboot ROM properly first. + Although ROM images are provided pre-built in libreboot, there are some modifications that + you need to make to the one you chose before flashing. (instructions referenced later in + this guide) + </p> + + <p> + <b> + NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now, you + must build for it from source using the libreboot git repository. + </b> + </p> + + <p><a href="index.html">Back to main index</a></p> + </div> + + <div class="section"> + + <h2 id="serial_port">Serial port</h2> + + <p> + EHCI debug might not be needed. It has been reported that the docking station + for this laptop has a serial port, so it might be possible to use that instead. + </p> + + </div> + + <div class="section"> + + <h1 id="lcd_compatibility">LCD compatibly</h1> + <p> + Not all LCD panels are known to be compatible yet. See <a href="../hcl/gm45_lcd.html">../hcl/gm45_lcd.html</a>. + </p> + + </div> + + <div class="section" id="cpu_compatibility"> + + <h1>A note about CPUs</h1> + <p> + <a href="http://www.thinkwiki.org/wiki/Category:R500">ThinkWiki</a> has a list of CPUs + for this system. The Core 2 Duo P8400, P8600 and P8700 are believed to work in libreboot. + The Core 2 Duo T9600 was confirmed to work (on a different laptop, but still GM45), so the T9400 probably also works. + <b>The Core 2 Duo T5870/5670 and Celeron M 575/585 are untested!</b> + </p> + + <h2>Quad-core CPUs</h2> + + <p> + Although blocked by lenovobios (as was reported), it is reported that there are quad-core CPUs + for GM45. This laptop has socketed CPUs, so it might be possible to use them + (they are untested in coreboot; support may have to be added). + Core 2 Quad Q9000, Q9100 or QX9300. + </p> + + <p> + Look at this link:<br/> + <a href="https://en.wikipedia.org/wiki/List_of_Intel_Core_2_microprocessors#Quad-Core_Notebook_processors">https://en.wikipedia.org/wiki/List_of_Intel_Core_2_microprocessors#Quad-Core_Notebook_processors</a> + </p> + + </div> + + <div class="section" id="switchable_graphics"> + + <h1>A note about GPUs</h1> + + <p> + <a href="http://www.thinkwiki.org/wiki/Category:R500">ThinkWiki</a> lists + two possible GPUs: Intel or ATI. Only the Intel GPUs work in libreboot; the ATI + GPUs require a proprietary Video BIOS, and so those are unsupported in libreboot. + </p> + <p> + On other GM45 laptops in libreboot (e.g. T400, T500), so-called <i>switchable graphics</i> + is used, which means that the laptop will have <b>both</b> an ATI and Intel GPU, or it will + only have Intel, depending on which variation you have. On the systems with ATI and Intel, + you can disable the ATI GPU and use only the Intel GPU, which works in libreboot. + </p> + <div class="important"> + <p> + <b> + It is unknown whether R500 laptops with an ATI GPU still have an Intel GPU, where you could + disable the ATI GPU and use the Intel GPU. These are budget laptops, so it's highly likely + that Lenovo decided on this model to ship with one GPU or the other, but not both (GPUs cost money). + </b> + </p> + <p> + <b> + It is **HIGHLY** recommended, when ordering an R500 laptop, to **ENSURE** that the + one you're ordering has an Intel GPU. + </b> + </p> + </div> + + <h1>CPU paste required</h1> + + <p> + See <a href="#paste">#paste</a>. + </p> + + </div> + + <div class="section"> + + <h1 id="flashchips">Flash chip size</h1> + + <p> + Use this to find out:<br> + # <b>dmidecode | grep ROM\ Size</b><br> + </p> + <p> + It is believed that all R500 laptops have only SOIC-8 (4MiB) chips. + </p> + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section photos"> + + <h1 id="macaddress">MAC address</h1> + + <p> + Unlike other GM45 thinkpads, the R500 has a different onboard gigabit NIC, + where the MAC address is built-in. You do not need to change the MAC address + at all on this laptop; simply flash the provided ROM images, as-is. + </p> + + </div> + + <div class="section photos"> + + <h1>Initial BBB configuration</h1> + + <p> + Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to + setup the BBB for flashing. + </p> + + <p> + The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): + </p> +<pre> +POMONA 5250 (correlate with the BBB guide) +=== VGA and ethernet socket === + 18 - - 1 + 22 - - NC + NC - - 21 + 3.3V (PSU) - - 17 - this is pin 1 on the flash chip +=== DVD drive === +<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i><br/> +<img src="images/r500/flashchip.jpg" alt="" /> +</pre> + + <h2 id="disassembly">Disassembly</h2> + + <p> + <img src="images/r500/0001.JPG" alt="" /> + <img src="images/r500/0002.JPG" alt="" /> + <img src="images/r500/0003.JPG" alt="" /> + <img src="images/r500/0004.JPG" alt="" /> + <img src="images/r500/0005.JPG" alt="" /> + <img src="images/r500/0006.JPG" alt="" /> + <img src="images/r500/0007.JPG" alt="" /> + <img src="images/r500/0008.JPG" alt="" /> + <img src="images/r500/0009.JPG" alt="" /> + <img src="images/r500/0010.JPG" alt="" /> + <img src="images/r500/0011.JPG" alt="" /> + <img src="images/r500/0012.JPG" alt="" /> + <img src="images/r500/0013.JPG" alt="" /> + <img src="images/r500/0014.JPG" alt="" /> + <img src="images/r500/0015.JPG" alt="" /> + <img src="images/r500/0016.JPG" alt="" /> + <img src="images/r500/0017.JPG" alt="" /> + <img src="images/r500/0018.JPG" alt="" /> + <img src="images/r500/0019.JPG" alt="" /> + <img src="images/r500/0020.JPG" alt="" /> + <img src="images/r500/0021.JPG" alt="" /> + <img src="images/r500/0022.JPG" alt="" /> + <img src="images/r500/0023.JPG" alt="" /> + <img src="images/r500/0024.JPG" alt="" /> + <img src="images/r500/0025.JPG" alt="" /> + <img src="images/r500/0026.JPG" alt="" /> + <img src="images/r500/0027.JPG" alt="" /> + <img src="images/r500/0028.JPG" alt="" /> + <img src="images/r500/0029.JPG" alt="" /> + <img src="images/r500/0030.JPG" alt="" /> + <img src="images/r500/0031.JPG" alt="" /> + </p> + + <p> + Remove the motherboard from the cage, and the SPI flash + chip will be next to the memory slots:<br/> + <img src="images/r500/0032.JPG" alt="" /> + <img src="images/r500/flashchip.jpg" alt="" /> + </p> + + <p> + The following image is for illustration only, to show how a SOIC-8 clip is connected. + This photo is from a T500, which has a different arrangement to the R500:<br/> + <img src="images/t500/0061.jpg" alt="" /> + </p> + <p> + Connect your programmer, then connect GND and 3.3V<br/> + <img src="images/t400/0067.jpg" alt="" /> + <img src="images/t400/0069.jpg" alt="" /> + <img src="images/t400/0070.jpg" alt="" /> + <img src="images/t400/0071.jpg" alt="" /> + </p> + <p> + A dedicated 3.3V PSU was used to create this guide, but + at ATX PSU is also fine:<br/> + <img src="images/t400/0072.jpg" alt="" /> + </p> + + <p> + Of course, make sure to turn on your PSU:<br/> + <img src="images/x200/disassembly/0013.jpg" alt="" /> + </p> + + <p> + Now, you should be ready to install libreboot. + </p> + + <p> + Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively, + libreboot also distributes flashrom source code which can be built. + </p> + <p> + Log in as root on your BBB, using the instructions in <a href="bbb_setup.html#bbb_access">bbb_setup.html#bbb_access</a>. + </p> + <p> + Test that flashrom works:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512</b><br/> + In this case, the output was: + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6406E/MX25L6436E" (8192 kB, SPI) on linux_spi. +Found Macronix flash chip "MX25L6445E/MX25L6473E" (8192 kB, SPI) on linux_spi. +Multiple flash chip definitions match the detected chip(s): "MX25L6405(D)", "MX25L6406E/MX25L6436E", "MX25L6445E/MX25L6473E" +Please specify which chip definition to use with the -c <chipname> option. +</pre> + <p> + How to backup factory.rom (change the -c option as neeed, for your flash chip):<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom</b><br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom</b><br/> + Note: the <b>-c</b> option is not required in libreboot's patched flashrom, because + the redundant flash chip definitions in <i>flashchips.c</i> have been removed.<br/> + Now compare the 3 images:<br/> + # <b>sha512sum factory*.rom</b><br/> + If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another system, not + the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware + that could be replicated in coreboot and libreboot. + </p> + <p> + Now flash it:<br/> + # <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V</b> + </p> + <p> + <img src="images/x200/disassembly/0015.jpg" alt="" /> + </p> + <p> + You might see errors, but if it says <b>Verifying flash... VERIFIED</b> at the end, then it's flashed and should boot. + If you see errors, try again (and again, and again); the message <b>Chip content is identical to the requested image</b> + is also an indication of a successful installation. + </p> + <p> + Example output from running the command (see above): + </p> +<pre> +flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l) +flashrom is free software, get the source code at http://www.flashrom.org +Calibrating delay loop... OK. +Found Macronix flash chip "MX25L6405(D)" (8192 kB, SPI) on linux_spi. +Reading old flash chip contents... done. +Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716 +ERASE FAILED! +Reading current flash chip contents... done. Looking for another erase function. +Erase/write done. +Verifying flash... VERIFIED. +</pre> + + + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section photos" id="paste"> + + <h1>Thermal paste (IMPORTANT)</h1> + + <p> + Because part of this procedure involved removing the heatsink, you will need to apply new paste. + Arctic Silver 5 is ok. You will also need isopropyl alcohol and an anti-static cloth to clean with. + </p> + + <p> + When re-installing the heatsink, you must first clean off all old paste with the alcohol/cloth. + Then apply new paste. AS5 is also much better than the default paste used on these systems. + </p> + + <p> + <img src="images/t400/paste.jpg" alt="" /> + </p> + + <p> + NOTE: the photo above is for illustration purposes only, and does not show how to properly apply the thermal paste. + Other guides online detail the proper application procedure. + </p> + + </div> + + <div class="section"> + + <h1 id="wifi">Wifi</h1> + + <p> + The R500 typically comes with an Intel wifi chipset, which does not + work without proprietary software. For a list of wifi chipsets that + work without proprietary software, see + <a href="../hcl/index.html#recommended_wifi">../hcl/index.html#recommended_wifi</a>. + </p> + + <p> + Some R500 laptops might come with an Atheros chipset, but this is 802.11g only. + </p> + + <p> + It is recommended that you install a new wifi chipset. This can only + be done after installing libreboot, because the original firmware has + a whitelist of approved chips, and it will refuse to boot if you + use an 'unauthorized' wifi card. + </p> + + <p> + The following photos show an Atheros AR5B95 being installed, to + replace the Intel chip that this R500 came with:<br/> + <img src="images/t400/0012.jpg" alt="" /> + <img src="images/t400/ar5b95.jpg" alt="" /> + </p> + + </div> + + <div class="section"> + + <h1 id="wwan">WWAN</h1> + <p> + If you have a WWAN/3G card and/or sim card reader, remove them permanently. + The WWAN-3G card has proprietary firmware inside; the technology is + identical to what is used in mobile phones, so it can also track your movements. + </p> + <p> + Not to be confused with wifi (wifi is fine). + </p> + + </div> + + <div class="section photos"> + + <h1 id="memory">Memory</h1> + + <p> + You need DDR3 SODIMM PC3-8500 RAM installed, in matching pairs + (speed/size). Non-matching pairs won't work. You can also install a + single module (meaning, one of the slots will be empty) in slot 0. + </p> + + <p> + Make sure that the RAM you buy is the 2Rx8 density. + </p> + + <p> + The following photo shows 8GiB (2x4GiB) of RAM installed:<br/> + <img src="images/t400/memory.jpg" alt="" /> + </p> + + </div> + + <div class="section photos"> + + <h2> + Boot it! + </h2> + <p> + You should see something like this: + </p> + <p> + <img src="images/t400/boot0.jpg" alt="" /> + <img src="images/t400/boot1.jpg" alt="" /> + </p> + + <p> + Now <a href="../gnulinux/index.html">install GNU/Linux</a>. + </p> + + </div> + + <div class="section"> + + <p> + Copyright © 2015 Francis Rowe <info@gluglug.org.uk><br/> + Permission is granted to copy, distribute and/or modify this document + under the terms of the GNU Free Documentation License, Version 1.3 + or any later version published by the Free Software Foundation; + with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. + A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a> + </p> + + <p> + Updated versions of the license (when available) can be found at + <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a> + </p> + + <p> + UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE + EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS + AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF + ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS, + IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION, + WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR + PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS, + ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT + KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT + ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU. + </p> + <p> + TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE + TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION, + NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT, + INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES, + COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR + USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN + ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR + DAMAGES. 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