Development notes

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standard test

These logs are usually obtained when testing changes related to graphics on i945 (X60 and T60).

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T60 cpu microcode

TODO: T60: find (for rare buggy CPU's that are unstable without microcode updates) if there is a workaround (patched kernel, special parameter, etc) So far, only 1 processor has been found to have issues. See microcode errata sheets http://download.intel.com/design/mobile/SPECUPDT/31407918.pdf and http://download.intel.com/design/mobile/SPECUPDT/30922214.pdf and then look at the debugging results collected in t7200q directory (q means quirk).

Every other T7200 tested so far has worked without microcode updates.

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i945 VRAM size

Apparently, only 8MB VRAM is available on i945 GPU's (though it could do 64MB):
phcoder: No. Hardware default is 8 MiB. When I wanted to make it configurable, I saw that docs mention only one other alternative: 1MiB. Later isn't event enough for 1024x768 at 24bpp without any acceleration or double buffering. It's possible there are undocumented values. Which options do you have in vendor BIOS? How to find out how much vram you have:
phcoder: TOM - BSM
phcoder: check what vendor BIOS offers as options
fchmmr: I thought it could do 64MB usually
phcoder: not accorging to doc.
phcoder: see mobile-945-express-chipset-datasheet page 93
phcoder: see also src/northbridge/intel/i945/{early_init,northbridge,gma}.c
fchmmr: "011 = DVMT (UMA) mode, 8 MB of memory pre-allocated for
fchmmr: frame buffer."
fchmmr: "Others - reserved"
phcoder: the easiest way is a loop at this position which tries different values and reads (and prints) BSM with them
stefanct: fchmmr: he suggest that you change the value and look how BSM reacts to that
stefanct: as he pointed out earlier vram size = TOM - BSM
stefanct: different values of GMS
stefanct: phcoder: hm... this could be a hint. look at the text description of TOLUD at page 103
stefanct: it mentions 64 MB in the text about BSM as well
stefanct: table 18...
phcoder: stefanct: I have a guess which value make is 64 but I will not tell to avoid skewing test results
stefanct: phcoder: sure... i assumed you were not sure if it supports it at all. testing it properly is of course a good idea :)
stefanct: test the various possible (but reserved) values of GMS and see what the resulting VRAM size is
fchmmr: so, TOM - BSM

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LCD panels on i945 - fix incompatible panels

Fix T60 issues (see incompatible panels listed at ../hcl/index.html#supported_t60_list).

Run that tool (resources/utilities/i945gpu/intel-regs.py) as root on machines with the offending panels in:

This shows values in devicetree.cb and src/northbridge/intel/i945/gma.c, the idea is that you run it on factory bios or vbios and that it will (might) show different values: then you try those in the native graphics (in libreboot).

Other values/registers might also need to be added to the script for these tests.

check if intel_bios_reader from intel-gpu-tools reports the same value (BIOS has a hardcoded value) for PWM modulation frequency. This file can read the VBIOS (64K dump).

Check other tools in intel-gpu-tools aswell, compare outputs. Possibly add more information to intel-regs.py output (submit changes to mtjm). Do oprom trace / replay (http://www.coreboot.org/User:GNUtoo#How_to_get_rid_of_the_vbios_of_the_x60_.5BNew_Version.5D)

Study how EDID works and how gma.c handles it.

Original getregs.py script can be found at http://hg.mtjm.eu/scripts/file/tip/intel-regs.py written by Michał Masłowski.

About fixing remaining LCD panels on 5345:
'polarity' is mentioned in coreboot log (cbmem -c). compare output (with working and non-working panel). (and see the other notes in docs/future/index.html)
phcoder says: hint for T60: it might be that failing panels are 8bpc
fchmmr: what does 8bpc mean? And what do you think the other (non-failing) panel are?
phcoder: 6bpc. bits per colour. May also be reffered as 18-bit vs 24-bit panels
phcoder: just collect EDIDs from failing and working panels
phcoder gave me this for collecting EDID data: http://www.o2genum.com/2013/08/lp156wh2-tlaa-lcd-panel-edid.html

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i945 gfx: X60/T60 VBT implementation (experimental: testing)

intel_bios_dumper in intel-gpu-tools seems interesting.

Use 'drm.debug=0x06' kernel parameter when booting in grub!

Before each test run, boot a live USB and delete the old logs in /var/log (kernel log, xorg log, dmesg and so on).

Load (from the ROM) the runningvga.bin for each LCD panel on each machine; do not execute it, only load it! (coreboot will have to be modified). Rename the ROM appropriately, based on the machine name and the panel name. coreboot_nativegfx_5868_plusrunningvga_t60_14_LTD141ECMB.rom, for instance. Keep a copy for later use.

You are supposed to:

With each boot, make notes about what you see and get logs using the standard test. You will need the files from #intelvbttool_results for each machine.

Results (# means untested):

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intelvbttool test results (VGA ROM's)

The VBIOS on i945 (intel gpu) platforms is self-modifying; that is, it's contents change when you run it. intelvbttool takes a dump of the currently running vbios, and parses it.

The idea is that we can extract the VBT tables using this knowledge, on the X60, X60 Tablet and T60 (Intel GPU).

Here is an example of how VBT was implemented on the ThinkPad X230: http://review.coreboot.org/#/c/5396.

You'll need to build a T60 ROM with SeaBIOS and the VGA ROM (for Intel GPU). An X60 ROM is also needed (same configuration, using the VGA ROM for X60).

T60 has DVI on it's dock, make sure that the dock is attached when getting this output.

Get intelvbttool here: http://review.coreboot.org/#/c/5842 (util/intelvbttool).

Now dump a copy of the running VGA BIOS: $ sudo dd if=/dev/mem bs=64k of=runningvga.bin skip=12 count=1
Then do (and record the output):
$ ./intelvbttool runningvga.bin > intelvbttool_out

Backup both files (runningvga.bin and intelvbttool_out), renaming them to match the machine and LCD panel used. ../misc/index.html#get_edid_panelname will show you how to get the name (model) of the LCD panel used.

Test results (# means untested and all had docks, unless noted).

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Copyright © 2014 Francis Rowe <info@gluglug.org.uk>
This document is released under the Creative Commons Attribution-ShareAlike 4.0 International Public License and all future versions. A copy of the license can be found at ../license.txt.

This document is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See ../license.txt for more information.