From d4bee5d0fb8b8775af2a0da356fce9d3bf8104bb Mon Sep 17 00:00:00 2001
From: Francis Rowe <info@gluglug.org.uk>
Date: Mon, 04 May 2015 09:58:54 -0400
Subject: Update coreboot + merge GM45 hybrid GPU patches

Also add power_on_after_fail to X200 and others (prevents the bug
where the system would boot when connecting the AC adapter)
(option in menuconfig to use CMOS/nvram settings is now enabled)

Also NetDCDC is now the default USB debug dongle used (compatible
with the BBB rev C).

Add two new methods for managing coreboot configs:
./build config corebootreplace
./build config corebootmodify
---
(limited to 'resources/utilities/coreboot-libre/nonblobs')

diff --git a/resources/utilities/coreboot-libre/nonblobs b/resources/utilities/coreboot-libre/nonblobs
index 3a7e3fe..e8bb6af 100644
--- a/resources/utilities/coreboot-libre/nonblobs
+++ b/resources/utilities/coreboot-libre/nonblobs
@@ -243,14 +243,16 @@
 ./src/mainboard/google/bolt/elpida_4Gb_1600_x16.spd.hex
 ./src/mainboard/google/peppy/Hynix_HMT425S6AFR6A.spd.hex
 ./src/mainboard/google/peppy/Elpida_EDJ4216EFBG.spd.hex
-./src/mainboard/google/samus/spd/samsung_4Gb.spd.hex
-./src/mainboard/google/samus/spd/empty.spd.hex
-./src/mainboard/google/samus/spd/elpida_8Gb.spd.hex
-./src/mainboard/google/samus/spd/hynix_4Gb.spd.hex
-./src/mainboard/google/samus/spd/samsung_8Gb.spd.hex
-./src/mainboard/google/samus/spd/hynix_8Gb.spd.hex
-./src/mainboard/google/samus/spd/elpida_4Gb.spd.hex
 ./src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex
+./src/mainboard/google/samus/spd/empty.spd.hex
+./src/mainboard/google/samus/spd/elpida_4.spd.hex
+./src/mainboard/google/samus/spd/hynix_4.spd.hex
+./src/mainboard/google/samus/spd/elpida_16.spd.hex
+./src/mainboard/google/samus/spd/hynix_8.spd.hex
+./src/mainboard/google/samus/spd/hynix_16.spd.hex
+./src/mainboard/google/samus/spd/samsung_8.spd.hex
+./src/mainboard/google/samus/spd/elpida_8.spd.hex
+./src/mainboard/google/samus/spd/samsung_4.spd.hex
 ./src/northbridge/intel/nehalem/raminit_tables.c
 ./src/northbridge/intel/sandybridge/raminit_patterns.h
 ./src/southbridge/nvidia/mcp55/early_setup_ss.h
@@ -273,3 +275,4 @@
 ./src/northbridge/amd/pi/00630F01/Kconfig
 ./src/cpu/amd/microcode/microcode.c
 ./src/lib/tlcl_structures.h
+./util/rockchip/make_idb.py
--
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