From 7c82fca26642d4c43f84beb6c4f6ea7ce7b01d39 Mon Sep 17 00:00:00 2001
From: Francis Rowe <info@gluglug.org.uk>
Date: Sun, 28 Jun 2015 16:20:55 -0400
Subject: docs/hcl/{x200,t400,t500,r400}.html: Tidy up

---
(limited to 'docs/hcl/t400.html')

diff --git a/docs/hcl/t400.html b/docs/hcl/t400.html
index dffc875..977e5c5 100644
--- a/docs/hcl/t400.html
+++ b/docs/hcl/t400.html
@@ -45,6 +45,30 @@
 
 	<div class="section">
 
+		<h2 id="compatibility_noblobs">Compatibility (without blobs)</h2>
+
+			<div class="subsection">
+				<h3 id="hwvirt">Hardware virtualization (vt-x)</h3>
+					<p>
+						The T400, when run without CPU microcode updates in coreboot, currently kernel panics
+						if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled
+						for the guest, the guest panics (but the host is fine). Working around this in QEMU
+						might be possible; if not, software virtualization should work fine (it's just slower).
+					</p>
+					<p>
+						On GM45 hardware (with libreboot), make sure that the <i>kvm</i> and <i>kvm_intel</i> kernel modules
+						are not loaded, when using QEMU.
+					</p>
+					<p>
+						The following errata datasheet from Intel might help with investigation:
+						<a href="http://download.intel.com/design/mobile/specupdt/320121.pdf">http://download.intel.com/design/mobile/specupdt/320121.pdf</a>
+					</p>
+			</div>
+
+	</div>
+
+	<div class="section">
+
 		<p>
 			The T400 is almost identical to the X200, code-wise. See <a href="x200.html">x200.html</a>.
 		</p>
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