From d1bb5d6fcc75f07ca6a58b5536906980aff9d253 Mon Sep 17 00:00:00 2001
From: Francis Rowe <info@gluglug.org.uk>
Date: Sat, 18 Jul 2015 19:31:16 -0400
Subject: New board: ThinkPad R500 (experimental)
The ich9deblob and ich9gen utilities were modified, so that they
support reading and/or writing descriptor images where the GbE
region is not defined. These utilities were also re-factored
and tidied up a bit.
A quick was noticed during the course of this work, in that
Compenent 1 Density was being set to 8MiB constantly, even
on systems with 4MiB flash chips. Component 2 Density was
set statically to 2MiB. ich9gen now sets both to 4MiB or 8MiB,
depending on whether building the descriptor for a 4MiB or
8MiB ROM image.
There are still some ACPI bugs (see docs/hcl/r500.html), which
will have to be fixed upstream. TODO: get hw reg dumps from
a factory R500, and compare with the X200 or T400 dumps.
---
(limited to 'docs/hcl/r500.html')
diff --git a/docs/hcl/r500.html b/docs/hcl/r500.html
new file mode 100644
index 0000000..434aac7
--- /dev/null
+++ b/docs/hcl/r500.html
@@ -0,0 +1,299 @@
+<!DOCTYPE html>
+<html>
+<head>
+ <meta charset="utf-8">
+ <meta name="viewport" content="width=device-width, initial-scale=1">
+
+ <style type="text/css">
+ @import url('../css/main.css');
+ </style>
+
+ <title>ThinkPad R500</title>
+</head>
+
+<body>
+
+ <div class="section">
+ <h1 id="pagetop">ThinkPad R500</h1>
+
+ <p>
+ It is believed that all or most R500 laptops are compatible.
+ See notes about <a href="../install/r500_external.html#cpu_compatibility">CPU compatibility</a> for
+ potential incompatibilities.
+ </p>
+
+ <p>
+ There are two possible flash chip sizes for the R500: 4MiB (32Mbit) or 8MiB (64Mbit).
+ This can be identified by the type of flash chip below the palmrest: 4MiB is SOIC-8, 8MiB
+ is SOIC-16.
+ <b>
+ NOTE: this paragraph is being treated with contempt. When an R500 was disassembled, it didn't look
+ like there was an extra place for SOIC-16. It's highly likely that these laptops only have SOIC-8 (4MiB)
+ flash chips. For now, libreboot will distribute 8MiB images just in case. If it is found later on
+ that no 8MiB (SOIC-16) chips exist on the R500, then libreboot will cease to distribute 8MiB ROM images
+ for this laptop. It is only said that the R500 has 4MiB or 8MiB, for now, since this is the case
+ on other GM45 thinkpads that are supported in libreboot.
+ </b>
+ </p>
+
+ <p>
+ <b>The R400 laptops come with the ME (and sometimes AMT in addition) before flashing libreboot. Libreboot disables and removes it
+ by using a modified descriptor: see <a href="gm45_remove_me.html">gm45_remove_me.html</a></b> (contains notes, plus
+ instructions)
+ </p>
+
+ <p>
+ Flashing instructions can be found at <a href="../install/index.html#flashrom">../install/index.html#flashrom</a>
+ </p>
+
+ <p>
+ <b>
+ NOTE: This board is unsupported in libreboot 20150518. To use it in libreboot, for now,
+ you must build for it from source using the libreboot git repository.
+ </b>
+ </p>
+
+ <p>
+ <a href="index.html">Back to previous index</a>.
+ </p>
+ </div>
+
+ <div class="section">
+
+ <h2 id="compatibility_noblobs">Compatibility (without blobs)</h2>
+
+ <div class="subsection">
+ <h3 id="hwvirt">Hardware virtualization (vt-x)</h3>
+ <p>
+ The R400, when run without CPU microcode updates in coreboot, currently kernel panics
+ if running QEMU with vt-x enabled on 2 cores for the guest. With a single core enabled
+ for the guest, the guest panics (but the host is fine). Working around this in QEMU
+ might be possible; if not, software virtualization should work fine (it's just slower).
+ </p>
+ <p>
+ On GM45 hardware (with libreboot), make sure that the <i>kvm</i> and <i>kvm_intel</i> kernel modules
+ are not loaded, when using QEMU.
+ </p>
+ <p>
+ The following errata datasheet from Intel might help with investigation:
+ <a href="http://download.intel.com/design/mobile/specupdt/320121.pdf">http://download.intel.com/design/mobile/specupdt/320121.pdf</a>
+ </p>
+ </div>
+
+ </div>
+
+ <div class="section">
+
+ <h1 id="lcd_compatibility">LCD compatibly</h1>
+ <p>
+ Not all LCD panels are known to be compatible yet. See <a href="gm45_lcd.html">gm45_lcd.html</a>.
+ </p>
+
+ </div>
+
+ <div class="section">
+
+ <p>
+ The R500 is almost identical to the X200, code-wise, but there are some hardware differences. See <a href="x200.html">x200.html</a>.
+ </p>
+
+ </div>
+
+ <div class="section">
+
+ <h2 id="regdumps">Hardware register dumps</h2>
+
+ <p>
+ The coreboot wiki <a href="http://www.coreboot.org/Motherboard_Porting_Guide">shows</a>
+ how to collect various logs useful in porting to new
+ boards. Following are outputs from the R500:
+ </p>
+
+ <ul>
+ <li>
+ Lenovo BIOS 3.13 (EC firmware 1.06):
+ <ul>
+ <li><a href="hwdumps/r500/">hwdumps/r500/</a></li>
+ </ul>
+ </ul>
+
+ </div>
+
+ <div class="section">
+
+ <h1 id="issues">Issues</h1>
+ <h2>
+ False report of overheating, automatic shut down
+ </h2>
+ <p>
+ When attempting to boot Trisquel 7 live USB (GNOME), the following error appears and then
+ the system abruptly shuts down:
+ <b>thermal thermal_zone1: critical temperature reached(120 C),shutting down</b>.
+ </p>
+ <p>
+ This is false. When booting with <b>acpi=off</b>, xsensors shows no overheating during a stress test.
+ The system does not feel hot, nor does anything smell like it's burning.
+ </p>
+ <p>
+ This is most likely caused by an ACPI bug in coreboot, which will have to be investigated. Grep for those things,
+ comparing factory/libreboot (iasl -d or acpidump):
+ </p>
+<pre>
+ Return (C2K(\_SB.PCI0.LPCB.EC.TMP0))
+TMP0, 8, /* Thermal Zone 0 temperature */
+</pre>
+ <h2>Cardbus slot didn't work when tested</h2>
+ <p>
+ Investigate.
+ </p>
+
+ </div>
+
+ <div class="section">
+
+ <h1>Descriptor differences</h1>
+
+ <p>
+ The <i>ich9gen</i> and <i>ich9deblob</i> utilities were modified,
+ to reflect these differences.
+ </p>
+
+ <h2>Component 1 Density</h2>
+
+<pre>
+- descriptorStruct.componentSection.flcomp.component1Density = 0x4;
++ descriptorStruct.componentSection.flcomp.component1Density = 0x3;
+</pre>
+
+ <p>
+ Read page 848 in the ICH9 datasheet, linked to from <a href="gm45_remove_me.html#flash_descriptor_region">gm45_remove_me.html#flash_descriptor_region</a>.
+ This doesn't break anything, but in the process of debugging descriptor differences on the R500, it was found that this
+ config option isn't being modified in libreboot, for different size ROM images. 4MiB ROM images still contain 0x4 for component1Density.
+ Per datasheets, 0x4 (100) is 8MiB, and 0x3 (011) is 4MiB. <b>This should be fixed!</b>
+ </p>
+ <p>
+ It was 0x3 for this test, because the R500 that was used to create this report
+ had a 4MiB SOIC-8 flash chip.
+ </p>
+
+ <h2>flReg1.LIMIT</h2>
+
+<pre>
+- /* descriptorStruct.regionSection.flReg1.LIMIT = 0x07ff; */
++ /* descriptorStruct.regionSection.flReg1.LIMIT = 0x03ff; */
+</pre>
+
+ <p>
+ Ignore this. This is not used at all, and is instead automatically set, depending on
+ the targetted ROM image size, both in ich9gen and ich9deblob. 0x7ff means 8MiB, and 0x3ff means
+ 4MiB. flReg1 is for the BIOS region. Simply speaking, this is defining the final 4KiB section
+ of the ROM image, where the BIOS region ends.
+ </p>
+ <p>
+ It was 0x3ff for this test, because the R500 that was used to create this report
+ had a 4MiB SOIC-8 flash chip.
+ </p>
+
+ <h2>Onboard gigabit ethernet NIC is disabled</h2>
+
+<pre>
+- descriptorStruct.ichStraps.ichStrap0.integratedGbe = 0x1;
+- descriptorStruct.ichStraps.ichStrap0.lanPhy = 0x1;
++ descriptorStruct.ichStraps.ichStrap0.integratedGbe = 0x0;
++ descriptorStruct.ichStraps.ichStrap0.lanPhy = 0x0;
+</pre>
+
+ <p>
+ Most GM45 laptops (e.g. X200, T400, T500, R400) have the <b>Intel 82567LM</b>
+ integrated gigabit NIC.
+ </p>
+ <p>
+ On the R500, a <b>Broadcom BCM5787M</b> NIC is present. To make this work,
+ the change above must be made for the R500 descriptor.
+ </p>
+
+ <h1 id="nogbe">No Gbe region!</h1>
+
+ <p>
+ Not shown in the diffs above:
+ </p>
+
+<pre>
+Original: Descriptor start block: 00000000 ; Descriptor end block: 00000000
+Original: BIOS start block: 00200000 ; BIOS end block: 003ff000
+Original: ME start block: 00001000 ; ME end block: 001f7000
+Original: GBe start block: 00fff000 ; GBe end block: 00000000
+Original: Platform start block: 001f8000 ; Platform end block: 001ff000
+</pre>
+
+ <p>
+ As explained above, this laptop uses a Broadcom NIC, which means that
+ the Gbe region does not and <i>should not</i> exist, since this is for the
+ Intel NIC only.
+ </p>
+ <p>
+ In the output above, Gbe starts at fff and ends at 000. Base 1FFF or FFF, and limit 0,
+ means that the region is disabled.
+ </p>
+ <p>
+ In the output above, the ME region is 4KiB larger than on other GM45 systems that have
+ a Gbe region. This accounts for the lack of a Gbe region.
+ </p>
+
+ <p>
+ As part of this effort, ich9gen/ich9deblob/demefactory will all be
+ modified to account for the differences above.
+ </p>
+
+ </div>
+
+ <div class="section">
+
+ <p>
+ Copyright © 2015 Francis Rowe <info@gluglug.org.uk><br/>
+ Permission is granted to copy, distribute and/or modify this document
+ under the terms of the GNU Free Documentation License, Version 1.3
+ or any later version published by the Free Software Foundation;
+ with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
+ A copy of the license can be found at <a href="../gfdl-1.3.txt">../gfdl-1.3.txt</a>
+ </p>
+
+ <p>
+ Updated versions of the license (when available) can be found at
+ <a href="https://www.gnu.org/licenses/licenses.html">https://www.gnu.org/licenses/licenses.html</a>
+ </p>
+
+ <p>
+ UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
+ EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
+ AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF
+ ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS,
+ IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION,
+ WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR
+ PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS,
+ ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT
+ KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT
+ ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU.
+ </p>
+ <p>
+ TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
+ TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION,
+ NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT,
+ INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES,
+ COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR
+ USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN
+ ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR
+ DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR
+ IN PART, THIS LIMITATION MAY NOT APPLY TO YOU.
+ </p>
+ <p>
+ The disclaimer of warranties and limitation of liability provided
+ above shall be interpreted in a manner that, to the extent
+ possible, most closely approximates an absolute disclaimer and
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+ </p>
+
+ </div>
+
+</body>
+</html>
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