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author | Francis Rowe <info@gluglug.org.uk> | 2015-01-10 18:07:56 (EST) |
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committer | Francis Rowe <info@gluglug.org.uk> | 2015-01-10 18:07:56 (EST) |
commit | f6da483213c5a9ad026c2740eeff120414492a40 (patch) | |
tree | 72c62f49cc617a15a023134c26679c30133aacab /resources | |
parent | 74adfa0f8c41754d1a74006b6ca5f923fd2af503 (diff) | |
download | libreboot-f6da483213c5a9ad026c2740eeff120414492a40.zip libreboot-f6da483213c5a9ad026c2740eeff120414492a40.tar.gz libreboot-f6da483213c5a9ad026c2740eeff120414492a40.tar.bz2 |
ich9deblob/ich9gen: use portable data types
For those integers that need to be a certain byte size.
Diffstat (limited to 'resources')
14 files changed, 244 insertions, 235 deletions
diff --git a/resources/utilities/ich9deblob/Makefile b/resources/utilities/ich9deblob/Makefile index a1d979d..be4df85 100644 --- a/resources/utilities/ich9deblob/Makefile +++ b/resources/utilities/ich9deblob/Makefile @@ -18,7 +18,8 @@ # CC=gcc -CFLAGS=-I. -Wall -g +FORCEC99=-std=c99 +CFLAGS=-I. -Wall -Wextra -g $(FORCEC99) NOLINKER=-c all: ich9deblob ich9gen diff --git a/resources/utilities/ich9deblob/src/common/descriptor_gbe.c b/resources/utilities/ich9deblob/src/common/descriptor_gbe.c index ca50ac0..581f755 100644 --- a/resources/utilities/ich9deblob/src/common/descriptor_gbe.c +++ b/resources/utilities/ich9deblob/src/common/descriptor_gbe.c @@ -31,8 +31,8 @@ int notCreatedDescriptorGbeFile(struct DESCRIPTORREGIONRECORD descriptorStruct, FILE* fileStream = NULL; /* These will have the structs copied to them */ - char descriptorBuffer[DESCRIPTORREGIONSIZE]; - char gbeBuffer8k[GBEREGIONSIZE_8K]; + uint8_t descriptorBuffer[DESCRIPTORREGIONSIZE]; + uint8_t gbeBuffer8k[GBEREGIONSIZE_8K]; /* Copy the structs to buffers, to make writing them as files easier */ memcpy(&descriptorBuffer, &descriptorStruct, DESCRIPTORREGIONSIZE); /* descriptor */ @@ -45,14 +45,14 @@ int notCreatedDescriptorGbeFile(struct DESCRIPTORREGIONRECORD descriptorStruct, fileStream = fopen(fileName, "ab"); /* write the descriptor region into the first part */ - if (DESCRIPTORREGIONSIZE != fwrite(descriptorBuffer, sizeof(char), DESCRIPTORREGIONSIZE, fileStream)) + if (DESCRIPTORREGIONSIZE != fwrite(descriptorBuffer, 1, DESCRIPTORREGIONSIZE, fileStream)) { printf("\nerror: writing descriptor region failed\n"); return 1; } /* add gbe to the end of the file */ - if (GBEREGIONSIZE_8K != fwrite(gbeBuffer8k, sizeof(char), GBEREGIONSIZE_8K, fileStream)) + if (GBEREGIONSIZE_8K != fwrite(gbeBuffer8k, 1, GBEREGIONSIZE_8K, fileStream)) { printf("\nerror: writing GBe region failed\n"); return 1; diff --git a/resources/utilities/ich9deblob/src/common/descriptor_gbe.h b/resources/utilities/ich9deblob/src/common/descriptor_gbe.h index cc0cc42..d3e8977 100644 --- a/resources/utilities/ich9deblob/src/common/descriptor_gbe.h +++ b/resources/utilities/ich9deblob/src/common/descriptor_gbe.h @@ -26,6 +26,7 @@ #include <stdio.h> #include <string.h> +#include <stdint.h> #include "../descriptor/descriptor.h" /* structs describing what's in the descriptor region */ #include "../gbe/gbe.h" /* structs describing what's in the gbe region */ diff --git a/resources/utilities/ich9deblob/src/common/x86compatibility.c b/resources/utilities/ich9deblob/src/common/x86compatibility.c index 505a37d..aaf3173 100644 --- a/resources/utilities/ich9deblob/src/common/x86compatibility.c +++ b/resources/utilities/ich9deblob/src/common/x86compatibility.c @@ -51,10 +51,10 @@ int structSizesIncorrect(struct DESCRIPTORREGIONRECORD descriptorDummy, struct G /* endianness check. big endian forced to fail */ int systemIsBigEndian() { - unsigned short steak = 0xBEEF; - unsigned char *grill = (unsigned char*)&steak; + uint16_t steak = 0xBEEF; + uint8_t *grill = (uint8_t*)&steak; - if (*grill==0xBE) { + if (*grill!=0xEF) { printf("\nunsigned short 0xBEEF: first byte should be EF, but it's BE. Your system is big endian, and unsupported (only little endian is tested)\n"); return 1; } @@ -66,7 +66,7 @@ int structMembersWrongOrder() { int i; struct DESCRIPTORREGIONRECORD descriptorDummy; - unsigned char *meVsccTablePtr = (unsigned char*)&descriptorDummy.meVsccTable; + uint8_t *meVsccTablePtr = (uint8_t*)&descriptorDummy.meVsccTable; /* These do not use bitfields. */ descriptorDummy.meVsccTable.jid0 = 0x01020304; /* unsigned int 32-bit */ @@ -124,7 +124,7 @@ int structBitfieldWrongOrder() { int i; struct DESCRIPTORREGIONRECORD descriptorDummy; - unsigned char *flMap0Ptr = (unsigned char*)&descriptorDummy.flMaps.flMap0; + uint8_t *flMap0Ptr = (uint8_t*)&descriptorDummy.flMaps.flMap0; descriptorDummy.flMaps.flMap0.FCBA = 0xA2; /* :8 --> 10100010 */ descriptorDummy.flMaps.flMap0.NC = 0x02; /* :2 --> 10 */ diff --git a/resources/utilities/ich9deblob/src/common/x86compatibility.h b/resources/utilities/ich9deblob/src/common/x86compatibility.h index d9d5bdb..e5f02be 100644 --- a/resources/utilities/ich9deblob/src/common/x86compatibility.h +++ b/resources/utilities/ich9deblob/src/common/x86compatibility.h @@ -26,6 +26,7 @@ #include <stdio.h> #include <string.h> +#include <stdint.h> #include "../descriptor/descriptor.h" /* structs describing what's in the descriptor region */ #include "../gbe/gbe.h" /* structs describing what's in the gbe region */ diff --git a/resources/utilities/ich9deblob/src/descriptor/descriptor.h b/resources/utilities/ich9deblob/src/descriptor/descriptor.h index 04a5c93..7feddf1 100644 --- a/resources/utilities/ich9deblob/src/descriptor/descriptor.h +++ b/resources/utilities/ich9deblob/src/descriptor/descriptor.h @@ -40,6 +40,7 @@ #include <stdio.h> #include <string.h> +#include <stdint.h> #include "../gbe/gbe.h" /* Needed for GBEREGIONSIZE_4K/8K define */ /* size of the descriptor in bytes */ @@ -67,39 +68,39 @@ struct FLVALSIG * descriptor mode = 0FF0A55A (hex, big endian). Note: stored in ROM in little endian order. * Anything else is considered invalid and will put the machine in non-descriptor mode. */ - unsigned int signature; /* Put 0x0FF0A55A here. confirmed in deblobbed_descriptor.bin */ + uint32_t signature; /* Put 0x0FF0A55A here. confirmed in deblobbed_descriptor.bin */ }; /* */ struct FLMAP0 { /* least signicant bits */ - unsigned char FCBA : 8; - unsigned char NC : 2; - unsigned char reserved1 : 6; - unsigned char FRBA : 8; - unsigned char NR : 3; - unsigned char reserved2 : 5; + uint8_t FCBA : 8; + uint8_t NC : 2; + uint8_t reserved1 : 6; + uint8_t FRBA : 8; + uint8_t NR : 3; + uint8_t reserved2 : 5; /* most significant bits. */ }; struct FLMAP1 { /* least significant bits */ - unsigned char FMBA : 8; - unsigned char NM : 3; - unsigned char reserved : 5; - unsigned char FISBA : 8; - unsigned char ISL : 8; + uint8_t FMBA : 8; + uint8_t NM : 3; + uint8_t reserved : 5; + uint8_t FISBA : 8; + uint8_t ISL : 8; /* most significant bits */ }; struct FLMAP2 { /* least significant bits */ - unsigned char FMSBA : 8; - unsigned char MSL : 8; - unsigned short reserved : 16; + uint8_t FMSBA : 8; + uint8_t MSL : 8; + uint16_t reserved : 16; /* most significant bits */ }; @@ -115,35 +116,35 @@ struct FLMAPS struct FLCOMP { /* least significant bits */ - unsigned char component1Density : 3; - unsigned char component2Density : 3; - unsigned char reserved1 : 2; - unsigned char reserved2 : 8; - unsigned char reserved3 : 1; - unsigned char readClockFrequency : 3; - unsigned char fastReadSupport : 1; - unsigned char fastreadClockFrequency : 3; - unsigned char writeEraseClockFrequency : 3; - unsigned char readStatusClockFrequency : 3; - unsigned char reserved4 : 2; + uint8_t component1Density : 3; + uint8_t component2Density : 3; + uint8_t reserved1 : 2; + uint8_t reserved2 : 8; + uint8_t reserved3 : 1; + uint8_t readClockFrequency : 3; + uint8_t fastReadSupport : 1; + uint8_t fastreadClockFrequency : 3; + uint8_t writeEraseClockFrequency : 3; + uint8_t readStatusClockFrequency : 3; + uint8_t reserved4 : 2; /* most significant bits */ }; struct COMPONENTSECTIONRECORD { struct FLCOMP flcomp; - unsigned int flill; - unsigned int flpb; - unsigned char padding[36]; + uint32_t flill; + uint32_t flpb; + uint8_t padding[36]; }; struct FLREG { /* least significant bits */ - unsigned short BASE : 13; - unsigned short reserved1 : 3; - unsigned short LIMIT : 13; - unsigned short reserved2 : 3; + uint16_t BASE : 13; + uint16_t reserved1 : 3; + uint16_t LIMIT : 13; + uint16_t reserved2 : 3; /* most significant bits */ }; @@ -159,25 +160,25 @@ struct REGIONSECTIONRECORD struct FLREG flReg2; /* ME */ struct FLREG flReg3; /* Gbe */ struct FLREG flReg4; /* Platform */ - unsigned char padding[12]; + uint8_t padding[12]; }; struct FLMSTR { /* least significant bits */ - unsigned short requesterId : 16; - unsigned char fdRegionReadAccess : 1; - unsigned char biosRegionReadAccess : 1; - unsigned char meRegionReadAccess : 1; - unsigned char gbeRegionReadAccess : 1; - unsigned char pdRegionReadAccess : 1; - unsigned char reserved1 : 3; /* Must be zero, according to datasheet */ - unsigned char fdRegionWriteAccess : 1; - unsigned char biosRegionWriteAccess : 1; - unsigned char meRegionWriteAccess : 1; - unsigned char gbeRegionWriteAccess : 1; - unsigned char pdRegionWriteAccess : 1; - unsigned char reserved2 : 3; /* Must be zero, according to datasheet */ + uint16_t requesterId : 16; + uint8_t fdRegionReadAccess : 1; + uint8_t biosRegionReadAccess : 1; + uint8_t meRegionReadAccess : 1; + uint8_t gbeRegionReadAccess : 1; + uint8_t pdRegionReadAccess : 1; + uint8_t reserved1 : 3; /* Must be zero, according to datasheet */ + uint8_t fdRegionWriteAccess : 1; + uint8_t biosRegionWriteAccess : 1; + uint8_t meRegionWriteAccess : 1; + uint8_t gbeRegionWriteAccess : 1; + uint8_t pdRegionWriteAccess : 1; + uint8_t reserved2 : 3; /* Must be zero, according to datasheet */ /* most significant bits */ }; @@ -187,39 +188,39 @@ struct MASTERACCESSSECTIONRECORD struct FLMSTR flMstr1; /* Flash Master 1 (Host CPU / BIOS) */ struct FLMSTR flMstr2; /* Flash Master 2 (ME) */ struct FLMSTR flMstr3; /* Flash Master 3 (Gbe) */ - unsigned char padding[148]; + uint8_t padding[148]; }; struct ICHSTRAP0 { /* least significant bits */ /* todo: add MeSmBus2Sel (boring setting) */ - unsigned char meDisable : 1; /* If true, ME is disabled. */ - unsigned char reserved1 : 6; - unsigned char tcoMode : 1; /* TCO Mode: (Legacy,TCO Mode) The TCO Mode, along with the BMCMODE strap, determines the behavior of the IAMT SmBus controller. */ - unsigned char smBusAddress : 7; /* The ME SmBus 7-bit address. */ - unsigned char bmcMode : 1; /* BMC mode: If true, device is in BMC mode. If Intel(R) AMT or ASF using Intel integrated LAN then this should be false. */ - unsigned char tripPointSelect : 1; /* Trip Point Select: false the NJCLK input buffer is matched to 3.3v signal from the external PHY device, true is matched to 1.8v. */ - unsigned char reserved2 : 2; - unsigned char integratedGbe : 1; /* Integrated GbE or PCI Express select: (PCI Express,,Integrated GbE) Defines what PCIe Port 6 is used for. */ - unsigned char lanPhy : 1; /* LANPHYPC_GP12_SEL: Set to 0 for GP12 to be used as GPIO (General Purpose Input/Output), or 1 for GP12 to be used for native mode as LAN_PHYPC for 82566 LCD device */ - unsigned char reserved3 : 3; - unsigned char dmiRequesterId : 1; /* DMI requestor ID security check disable: The primary purpose of this strap is to support server environments with multiple CPUs that each have a different RequesterID that can access the Flash. */ - unsigned char smBus2Address : 7; /* The ME SmBus 2 7-bit address. */ + uint8_t meDisable : 1; /* If true, ME is disabled. */ + uint8_t reserved1 : 6; + uint8_t tcoMode : 1; /* TCO Mode: (Legacy,TCO Mode) The TCO Mode, along with the BMCMODE strap, determines the behavior of the IAMT SmBus controller. */ + uint8_t smBusAddress : 7; /* The ME SmBus 7-bit address. */ + uint8_t bmcMode : 1; /* BMC mode: If true, device is in BMC mode. If Intel(R) AMT or ASF using Intel integrated LAN then this should be false. */ + uint8_t tripPointSelect : 1; /* Trip Point Select: false the NJCLK input buffer is matched to 3.3v signal from the external PHY device, true is matched to 1.8v. */ + uint8_t reserved2 : 2; + uint8_t integratedGbe : 1; /* Integrated GbE or PCI Express select: (PCI Express,,Integrated GbE) Defines what PCIe Port 6 is used for. */ + uint8_t lanPhy : 1; /* LANPHYPC_GP12_SEL: Set to 0 for GP12 to be used as GPIO (General Purpose Input/Output), or 1 for GP12 to be used for native mode as LAN_PHYPC for 82566 LCD device */ + uint8_t reserved3 : 3; + uint8_t dmiRequesterId : 1; /* DMI requestor ID security check disable: The primary purpose of this strap is to support server environments with multiple CPUs that each have a different RequesterID that can access the Flash. */ + uint8_t smBus2Address : 7; /* The ME SmBus 2 7-bit address. */ /* most significant bits */ }; struct ICHSTRAP1 { /* least significant bits */ - unsigned char northMlink : 1; /* North MLink Dynamic Clock Gate Disable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers. */ - unsigned char southMlink : 1; /* South MLink Dynamic Clock Gate Enable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers. */ - unsigned char meSmbus : 1; /* ME SmBus Dynamic Clock Gate Enable : Sets the default value for the ME SMBus Dynamic Clock Gate Enable for both the ME SmBus controllers. */ - unsigned char sstDynamic : 1; /* SST Dynamic Clock Gate Enable : Sets the default value for the SST Clock Gate Enable registers. */ - unsigned char reserved1 : 4; - unsigned char northMlink2 : 1; /* North MLink 2 Non-Posted Enable : 'true':North MLink supports two downstream non-posted requests. 'false':North MLink supports one downstream non-posted requests. */ - unsigned char reserved2 : 7; - unsigned short reserved3 : 16; + uint8_t northMlink : 1; /* North MLink Dynamic Clock Gate Disable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers. */ + uint8_t southMlink : 1; /* South MLink Dynamic Clock Gate Enable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers. */ + uint8_t meSmbus : 1; /* ME SmBus Dynamic Clock Gate Enable : Sets the default value for the ME SMBus Dynamic Clock Gate Enable for both the ME SmBus controllers. */ + uint8_t sstDynamic : 1; /* SST Dynamic Clock Gate Enable : Sets the default value for the SST Clock Gate Enable registers. */ + uint8_t reserved1 : 4; + uint8_t northMlink2 : 1; /* North MLink 2 Non-Posted Enable : 'true':North MLink supports two downstream non-posted requests. 'false':North MLink supports one downstream non-posted requests. */ + uint8_t reserved2 : 7; + uint16_t reserved3 : 16; /* most significant bits */ }; @@ -228,20 +229,20 @@ struct ICHSTRAPSRECORD { struct ICHSTRAP0 ichStrap0; struct ICHSTRAP1 ichStrap1; - unsigned char padding[248]; + uint8_t padding[248]; }; struct MCHSTRAP0 { /* least significant bits */ - unsigned char meDisable : 1; /* If true, ME is disabled. */ - unsigned char meBootFromFlash : 1; /* ME boot from Flash - guessed location */ - unsigned char tpmDisable : 1; /* iTPM Disable : When set true, iTPM Host Interface is disabled. When set false (default), iTPM is enabled. */ - unsigned char reserved1 : 3; - unsigned char spiFingerprint : 1; /* SPI Fingerprint Sensor Present: Indicates if an SPI Fingerprint sensor is present at CS#1. */ - unsigned char meAlternateDisable : 1; /* ME Alternate Disable: Setting this bit allows ME to perform critical chipset functions but prevents loading of any ME FW applications. */ - unsigned char reserved2 : 8; - unsigned short reserved3 : 16; + uint8_t meDisable : 1; /* If true, ME is disabled. */ + uint8_t meBootFromFlash : 1; /* ME boot from Flash - guessed location */ + uint8_t tpmDisable : 1; /* iTPM Disable : When set true, iTPM Host Interface is disabled. When set false (default), iTPM is enabled. */ + uint8_t reserved1 : 3; + uint8_t spiFingerprint : 1; /* SPI Fingerprint Sensor Present: Indicates if an SPI Fingerprint sensor is present at CS#1. */ + uint8_t meAlternateDisable : 1; /* ME Alternate Disable: Setting this bit allows ME to perform critical chipset functions but prevents loading of any ME FW applications. */ + uint8_t reserved2 : 8; + uint16_t reserved3 : 16; /* most significant bits */ }; @@ -249,36 +250,36 @@ struct MCHSTRAP0 struct MCHSTRAPSRECORD { struct MCHSTRAP0 mchStrap0; - unsigned char padding[3292]; + uint8_t padding[3292]; }; /* ME VSCC Table */ struct MEVSCCTABLERECORD { - unsigned int jid0; - unsigned int vscc0; - unsigned int jid1; - unsigned int vscc1; - unsigned int jid2; - unsigned int vscc2; - unsigned char padding[4]; + uint32_t jid0; + uint32_t vscc0; + uint32_t jid1; + uint32_t vscc1; + uint32_t jid2; + uint32_t vscc2; + uint8_t padding[4]; }; /* Descriptor Map 2 Record */ struct DESCRIPTORMAP2RECORD { /* least significant bits */ - unsigned char meVsccTableBaseAddress : 8; - unsigned char meVsccTableLength : 8; - unsigned short reserved : 16; + uint8_t meVsccTableBaseAddress : 8; + uint8_t meVsccTableLength : 8; + uint16_t reserved : 16; /* most significant bits */ }; /* OEM section */ struct OEMSECTIONRECORD { - unsigned char magicString[8]; - unsigned char padding[248]; + uint8_t magicString[8]; + uint8_t padding[248]; }; /* 4KiB descriptor region, goes at the beginning of the ROM image */ diff --git a/resources/utilities/ich9deblob/src/gbe/gbe.c b/resources/utilities/ich9deblob/src/gbe/gbe.c index 150d149..e8faa51 100644 --- a/resources/utilities/ich9deblob/src/gbe/gbe.c +++ b/resources/utilities/ich9deblob/src/gbe/gbe.c @@ -33,15 +33,15 @@ */ /* Read a 16-bit unsigned int from a supplied region buffer */ -unsigned short gbeGetRegionWordFrom8kBuffer(int index, char* regionData) +uint16_t gbeGetRegionWordFrom8kBuffer(int index, uint8_t* regionData) { - return *((unsigned short*)(regionData + (index * 2))); + return *((uint16_t*)(regionData + (index * 2))); } /* * gbe checksum calculation (algorithm based on datasheet) */ -unsigned short gbeGetChecksumFrom8kBuffer(char* regionData, unsigned short desiredValue, int byteOffset) +uint16_t gbeGetChecksumFrom8kBuffer(uint8_t* regionData, uint16_t desiredValue, int byteOffset) { int i; @@ -51,8 +51,8 @@ unsigned short gbeGetChecksumFrom8kBuffer(char* regionData, unsigned short desir */ int wordOffset = byteOffset >> 1; - unsigned short regionWord; /* store words here for adding to checksum */ - unsigned short checksum = 0; /* this gbe's checksum */ + uint16_t regionWord; /* store words here for adding to checksum */ + uint16_t checksum = 0; /* this gbe's checksum */ for (i = 0; i < 0x3F; i++) { regionWord = gbeGetRegionWordFrom8kBuffer(i+wordOffset, regionData); @@ -63,9 +63,9 @@ unsigned short gbeGetChecksumFrom8kBuffer(char* regionData, unsigned short desir } /* checksum calculation for 4k gbe struct (algorithm based on datasheet) */ -unsigned short gbeGetChecksumFrom4kStruct(struct GBEREGIONRECORD_4K gbeStruct4k, unsigned short desiredValue) +uint16_t gbeGetChecksumFrom4kStruct(struct GBEREGIONRECORD_4K gbeStruct4k, uint16_t desiredValue) { - char gbeBuffer4k[GBEREGIONSIZE_4K]; + uint8_t gbeBuffer4k[GBEREGIONSIZE_4K]; memcpy(&gbeBuffer4k, &gbeStruct4k, GBEREGIONSIZE_4K); return gbeGetChecksumFrom8kBuffer(gbeBuffer4k, desiredValue, 0); } @@ -79,7 +79,7 @@ struct GBEREGIONRECORD_8K deblobbedGbeStructFromFactory(struct GBEREGIONRECORD_8 * the backup as desired and then copy it to the main region. */ - int i; + unsigned int i; struct GBEREGIONRECORD_8K deblobbedGbeStruct8k; memcpy(&deblobbedGbeStruct8k, &factoryGbeStruct8k, GBEREGIONSIZE_8K); diff --git a/resources/utilities/ich9deblob/src/gbe/gbe.h b/resources/utilities/ich9deblob/src/gbe/gbe.h index 867927d..4b2f496 100644 --- a/resources/utilities/ich9deblob/src/gbe/gbe.h +++ b/resources/utilities/ich9deblob/src/gbe/gbe.h @@ -43,6 +43,7 @@ #include <stdio.h> #include <string.h> +#include <stdint.h> #include "../descriptor/descriptor.h" /* Size of the full gbe region in bytes */ @@ -77,70 +78,70 @@ struct GBE_RESERVED_WORD_03H { /* least significant bits */ - unsigned char reserved1_0 : 8; /* bits should all be set to zero */ - unsigned char reserved1_1 : 3; /* ^ part of above. Separated so that the bitfields align */ - unsigned char ibaLom : 1; /* set to 1 for intel boot agent to work (i.e. set it to 0) */ - unsigned char reserved2 : 4; /* bits should all be set to zero */ + uint8_t reserved1_0 : 8; /* bits should all be set to zero */ + uint8_t reserved1_1 : 3; /* ^ part of above. Separated so that the bitfields align */ + uint8_t ibaLom : 1; /* set to 1 for intel boot agent to work (i.e. set it to 0) */ + uint8_t reserved2 : 4; /* bits should all be set to zero */ /* most significant bits */ }; /* Word 0A */ struct GBE_PCI_INITIALIZATION_CONTROL_WORD { /* least significant bits */ - unsigned char loadVendorDeviceId : 1; /* 1 = load from NVM. 0 = load from MAC fuses. It's 1 in my deblobbed_descriptor.bin */ - unsigned char loadSubsystemId : 1; /* 1 = load from NVM. 0 = load from MAC fuses. It's 1 in my deblobbed_descriptor.bin */ - unsigned char reserved1 : 1; /* Reserved. Set to 0 (according to datasheet). 0 in my deblobbed_descriptor.bin */ - unsigned char reserved2 : 3; /* Reserved. Set them to 0 (according to datasheet). 0 in my deblobbed_descriptor.bin */ - unsigned char pmEnable : 1; /* Power Management Enable. 1=Enable. It's 1 in my deblobbed_descriptor.bin */ - unsigned char auxPwr : 1; /* Auxiliary Power Indication. See datasheet. it's 1 in my deblobbed_descriptor.bin */ - unsigned char reserved3 : 4; /* Reserved. Set to 0000 (according to datasheet). */ - unsigned char reserved4 : 4; /* Reserved. Set to 0001 (according to datasheet). */ + uint8_t loadVendorDeviceId : 1; /* 1 = load from NVM. 0 = load from MAC fuses. It's 1 in my deblobbed_descriptor.bin */ + uint8_t loadSubsystemId : 1; /* 1 = load from NVM. 0 = load from MAC fuses. It's 1 in my deblobbed_descriptor.bin */ + uint8_t reserved1 : 1; /* Reserved. Set to 0 (according to datasheet). 0 in my deblobbed_descriptor.bin */ + uint8_t reserved2 : 3; /* Reserved. Set them to 0 (according to datasheet). 0 in my deblobbed_descriptor.bin */ + uint8_t pmEnable : 1; /* Power Management Enable. 1=Enable. It's 1 in my deblobbed_descriptor.bin */ + uint8_t auxPwr : 1; /* Auxiliary Power Indication. See datasheet. it's 1 in my deblobbed_descriptor.bin */ + uint8_t reserved3 : 4; /* Reserved. Set to 0000 (according to datasheet). */ + uint8_t reserved4 : 4; /* Reserved. Set to 0001 (according to datasheet). */ /* most significant bits */ }; /* Word 10h. */ struct GBE_LAN_POWER_CONSUMPTION { /* least significant bits */ - unsigned char lanD3Power : 5; /* It's 00001b (0x1) in deblobbed_descriptor.bin */ - unsigned char reserved : 3; /* Reserved. These bits should all be 0. confirmed from deblobbed_descriptor.bin */ - unsigned char lanD0Power : 8; /* default value: 0x0D (according to datasheet). confirmed from deblobbed_descriptor.bin */ + uint8_t lanD3Power : 5; /* It's 00001b (0x1) in deblobbed_descriptor.bin */ + uint8_t reserved : 3; /* Reserved. These bits should all be 0. confirmed from deblobbed_descriptor.bin */ + uint8_t lanD0Power : 8; /* default value: 0x0D (according to datasheet). confirmed from deblobbed_descriptor.bin */ /* most significant bits */ }; /* Word 13h */ struct GBE_SHARED_INITIALIZATION_CONTROL_WORD { /* least significant bits */ - unsigned char reserved1 : 3; /* Reserved. These bits should be set to 101 (0x5) in binary (according to datasheet and deblobbed_descriptor.bin) */ - unsigned char forceDuplex : 1; /* Hardware default is 0 according to datasheet and deblobbed_descriptor.bin. Presumably to set whether the chipset is to operate at full- or half-duplex */ - unsigned char forceSpeedEnable : 1; /* Hardware default is 0. Presumably to limited speed eg 10, 10/100, 10/100/1000 */ - unsigned char reserved2_0 : 3; /* Reserved. All bits should be set to 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char reserved2_1 : 1; /* ^ part of above. separated so that bitfields align */ - unsigned char phyPowerDownEnable : 1; /* PHY Power Down in D3/Dr (if WoL is disabled), 1 means Enable power down. deblobbed_descriptor.bin says 1 */ - unsigned char reserved3 : 1; /* Reserved. Should be set to 1 according to datasheet and deblobbed_descriptor.bin */ - unsigned char reserved4 : 3; /* Reserved. These bits should all be 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t reserved1 : 3; /* Reserved. These bits should be set to 101 (0x5) in binary (according to datasheet and deblobbed_descriptor.bin) */ + uint8_t forceDuplex : 1; /* Hardware default is 0 according to datasheet and deblobbed_descriptor.bin. Presumably to set whether the chipset is to operate at full- or half-duplex */ + uint8_t forceSpeedEnable : 1; /* Hardware default is 0. Presumably to limited speed eg 10, 10/100, 10/100/1000 */ + uint8_t reserved2_0 : 3; /* Reserved. All bits should be set to 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t reserved2_1 : 1; /* ^ part of above. separated so that bitfields align */ + uint8_t phyPowerDownEnable : 1; /* PHY Power Down in D3/Dr (if WoL is disabled), 1 means Enable power down. deblobbed_descriptor.bin says 1 */ + uint8_t reserved3 : 1; /* Reserved. Should be set to 1 according to datasheet and deblobbed_descriptor.bin */ + uint8_t reserved4 : 3; /* Reserved. These bits should all be 0 according to datasheet and deblobbed_descriptor.bin */ /* ^ reserved4: indicates whether a valid NVM is present. If invalid, MAC does not read NVM and uses default values. */ /* 00 = invalid NVM, 01 = invalid NVM, 10 = valid NVM present, 11 = invalid NVM */ /* Default should be 10 (binary) according to datasheet and deblobbed_descriptor.bin */ - unsigned char sign : 2; /* Make sure to set this to 0x2 (10 in binary) */ + uint8_t sign : 2; /* Make sure to set this to 0x2 (10 in binary) */ /* most significant bits */ }; /* Word 14h */ struct GBE_EXTENDED_CONFIGURATION_CONTROL_WORD_1 { /* least significant bits */ - unsigned short extendedConfigurationPointer: 12; /* dword: base address of extended configuration area in NVM. should not be zero. Default is 020h according to datasheet and deblobbed_descriptor.bin */ - unsigned char oemWriteEnable : 1; /* 1=enable. if set, loads oem bits from phy_ctrl register to the 82567. loaded to EXTCNF_CTRL register. default is 1 according to datasheet and deblobbed_descriptor.bin */ - unsigned char reserved1 : 1; /* Reserved. default value 1 according to datasheet and deblobed_descriptor.bin */ - unsigned char reserved2 : 1; /* Reserved. default value 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char reserved3 : 1; /* Reserved. default value 0 according to datasheet and deblobbed_descriptor.bin */ + uint16_t extendedConfigurationPointer: 12; /* dword: base address of extended configuration area in NVM. should not be zero. Default is 020h according to datasheet and deblobbed_descriptor.bin */ + uint8_t oemWriteEnable : 1; /* 1=enable. if set, loads oem bits from phy_ctrl register to the 82567. loaded to EXTCNF_CTRL register. default is 1 according to datasheet and deblobbed_descriptor.bin */ + uint8_t reserved1 : 1; /* Reserved. default value 1 according to datasheet and deblobed_descriptor.bin */ + uint8_t reserved2 : 1; /* Reserved. default value 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t reserved3 : 1; /* Reserved. default value 0 according to datasheet and deblobbed_descriptor.bin */ /* most significant bits */ }; /* Word 15h */ struct GBE_EXTENDED_CONFIGURATION_CONTROL_WORD_2 { /* least significant bits */ - unsigned char reserved : 8; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char extendedPhyLength : 8; /* dword: size of extended phy configuration area. most be 0 if phy config area is disabled. default is 0000101 (binary) or 05 (hex) according to datasheet, but 00001010 (0A) according to deblobbed_descriptor.bin. Is 0000101 (in the datasheet) a typo that actually means 00001010? */ + uint8_t reserved : 8; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t extendedPhyLength : 8; /* dword: size of extended phy configuration area. most be 0 if phy config area is disabled. default is 0000101 (binary) or 05 (hex) according to datasheet, but 00001010 (0A) according to deblobbed_descriptor.bin. Is 0000101 (in the datasheet) a typo that actually means 00001010? */ /* most significant bits */ }; @@ -155,22 +156,22 @@ struct LED_CTL_1 { /* least significant bits */ /* See page 16 in the datasheet to show the different modes. deblobbed_descriptor.bin has "ACTIVITY" mode set */ - unsigned char led1Mode : 4; /* Default value 0111 (bin) 7 (hex) says datasheet. 1011 (bin) B (hex) according to deblobbed_descriptor.bin */ + uint8_t led1Mode : 4; /* Default value 0111 (bin) 7 (hex) says datasheet. 1011 (bin) B (hex) according to deblobbed_descriptor.bin */ - unsigned char reserved1 : 1; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char led1BlinkMode : 1; /* 0 = slow blink, 1 = fast blink. should be identical to led0 blink mode. Default is 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t reserved1 : 1; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t led1BlinkMode : 1; /* 0 = slow blink, 1 = fast blink. should be identical to led0 blink mode. Default is 0 according to datasheet and deblobbed_descriptor.bin */ /* By setting this and led0 blink mode (see word 18h) to 1, you could enable a faster blinking on the LED's where the ethernet cable goes * on the gigabit ethernet port. Not really useful. Slow blink is fine, and probably better (the LED will probably last longer) */ - unsigned char led1Invert : 1; /* initial value of LED1_IVRT field. 0 = led1 has active low output, 1 is high active output. Default is 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char led1Blink : 1; /* 1 = led1 blinks, 0 = it does not. default 0 according to datasheet, but it's 1 in deblobbed_descriptor.bin */ - unsigned char reserved2 : 1; /* Reserved. should be 1 according to datasheet and deblobbed_descriptor.bin */ - unsigned char lpluEnable : 1; /* Low Power Link Up. Enable links at lowest supported speed by both link partners in all power states. 1=enabled(all power states), 0=disabled. Default is 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char lpluEnableNonD0a : 1; /* Low Power Link up (non-D0a states). Same as above but only for non-D0a states. default is 1 according to and deblobbed_descriptor.bin */ - unsigned char gbeDisableNonD0a : 1; /* If set to 1, disable gigabit speeds in non-D0a power states. Must be 1 (according to datasheet) because GbE is not supported in Sx mode. It's also set to 1 in deblobbed_descriptor.bin */ - unsigned char reserved3 : 2; /* Reserved. Datasheet says both bits should be 0 (confirmed in deblobbed_descriptor.bin) */ - unsigned char gbeDisable : 1; /* When 1, gigabit speeds are disabled in all power states including D0a. Default is 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char reserved4 : 1; /* Reserved. Should be 1, according to datasheet and deblobbed_descriptor.bin */ + uint8_t led1Invert : 1; /* initial value of LED1_IVRT field. 0 = led1 has active low output, 1 is high active output. Default is 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t led1Blink : 1; /* 1 = led1 blinks, 0 = it does not. default 0 according to datasheet, but it's 1 in deblobbed_descriptor.bin */ + uint8_t reserved2 : 1; /* Reserved. should be 1 according to datasheet and deblobbed_descriptor.bin */ + uint8_t lpluEnable : 1; /* Low Power Link Up. Enable links at lowest supported speed by both link partners in all power states. 1=enabled(all power states), 0=disabled. Default is 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t lpluEnableNonD0a : 1; /* Low Power Link up (non-D0a states). Same as above but only for non-D0a states. default is 1 according to and deblobbed_descriptor.bin */ + uint8_t gbeDisableNonD0a : 1; /* If set to 1, disable gigabit speeds in non-D0a power states. Must be 1 (according to datasheet) because GbE is not supported in Sx mode. It's also set to 1 in deblobbed_descriptor.bin */ + uint8_t reserved3 : 2; /* Reserved. Datasheet says both bits should be 0 (confirmed in deblobbed_descriptor.bin) */ + uint8_t gbeDisable : 1; /* When 1, gigabit speeds are disabled in all power states including D0a. Default is 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t reserved4 : 1; /* Reserved. Should be 1, according to datasheet and deblobbed_descriptor.bin */ /* most significant bits */ }; @@ -184,38 +185,38 @@ struct LED_CTL_02 { /* least significant bits */ /* see page 16 in datasheet to show the different modes. deblobbed_descriptor has "LINK-UP" mode set */ - unsigned char led0Mode : 4; /* default value 0100 (bin) or 4 (hex) according to datasheet. It's 0010 (bin) or 2 (hex) according to deblobbed_descriptor.bin */ + uint8_t led0Mode : 4; /* default value 0100 (bin) or 4 (hex) according to datasheet. It's 0010 (bin) or 2 (hex) according to deblobbed_descriptor.bin */ - unsigned char reserved1 : 1; /* Reserved. Should be set to 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char led0BlinkMode : 1; /* This should be the same as led1BlinkMode (see word 17h). Default is 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char led0Invert : 1; /* initial value of LED0_IVRT field. 0 = led0 has active low output, 1 is high active output. Default is 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char led0Blink : 1; /* LED0_BLINK field. Should be 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t reserved1 : 1; /* Reserved. Should be set to 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t led0BlinkMode : 1; /* This should be the same as led1BlinkMode (see word 17h). Default is 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t led0Invert : 1; /* initial value of LED0_IVRT field. 0 = led0 has active low output, 1 is high active output. Default is 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t led0Blink : 1; /* LED0_BLINK field. Should be 0 according to datasheet and deblobbed_descriptor.bin */ /* see page 16 in datasheet to shew the different modes. deblobbed_descriptor has "LINK_100" mode set */ - unsigned char led2Mode : 4; /* default value 0110 (bin) or 6 (hex) according to datasheet and deblobbed_descriptor.bin */ + uint8_t led2Mode : 4; /* default value 0110 (bin) or 6 (hex) according to datasheet and deblobbed_descriptor.bin */ - unsigned char reserved2 : 1; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char led2BlinkMode : 1; /* 0 = slow blink. 1 = fast. default 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char led2Invert : 1; /* LED2_IVRT field. Should be 0 according to datasheet and deblobbed_descriptor.bin */ - unsigned char led2Blink : 1; /* LED2_BLINK field. should be 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t reserved2 : 1; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t led2BlinkMode : 1; /* 0 = slow blink. 1 = fast. default 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t led2Invert : 1; /* LED2_IVRT field. Should be 0 according to datasheet and deblobbed_descriptor.bin */ + uint8_t led2Blink : 1; /* LED2_BLINK field. should be 0 according to datasheet and deblobbed_descriptor.bin */ /* most significant bits */ }; /* Word 30h */ struct GBE_PXE_BOOT_AGENT_MAIN_SETUP_OPTIONS { /* least significant bits */ - unsigned char protocolSelect : 2; /* Default 00 binary (PXE) according to datasheet. 01 is reserved. 10/11 are undefined. deblobbed_descriptor.bin says 00 */ - unsigned char reserved1 : 1; /* Reserved. deblobbed_descriptor.bin says 0 */ - unsigned char defaultBootSelection : 2; /* deblobbed_descriptor.bin says 00 (binary). 00 is network boot, then local. 01 is local boot, then network. 10 is network boot only. 11 is local boot only */ - unsigned char reserved2 : 1; /* Reserved. deblobbed_descriptor.bin says 0. */ - unsigned char promptTime : 2; /* deblobbed_descriptor.bin says 00. delay for how long "press ctrl-s" setup prompt message appears. 00 = 2 secs, 01 is 3 secs, 10 is 5 secs, 11 is 0 secs. */ - unsigned char displaySetupMessage : 1; /* default 1 says datasheet. deblobbed_descriptor.bin says 1. if 1, "ctrl-s" setup prompt message appears after the title message. */ - unsigned char reserved3 : 1; /* Datasheet says to set 0. deblobbed_descriptor.bin says 0. */ - unsigned char forceSpeed : 2; /* deblobbed_descriptor.bin says 00. 00 = auto-negotiate, 01 = 10Mbps, 10 = 100Mbps, 11 = "not allowed" */ - unsigned char forceFullDuplex : 1; /* deblobbed_descriptor.bin says 0. Only relevant when bits 10/11 are set; if so, then: 0 = half duplex, 1 = full duplex */ - unsigned char reserved4 : 1; /* Reserved. deblobbed_descriptor.bin says 0. datasheet recommends 0. */ - unsigned char efiPresence : 1; /* 1 means that an EFI image is present (0 means not present). deblobbed_descriptor.bin says 0. if 1, eeprom word 33h (efi version) becomes valid. if pxePresent is 1, that means EFI and PXE are both present.*/ - unsigned char pxePresence : 1; /* 0 means that a PXE image is present. 1 means to pxe present. deblobbed_descriptor.bin says 0. if 0, then word 32h (PXE version) in eeprom becomes valid */ + uint8_t protocolSelect : 2; /* Default 00 binary (PXE) according to datasheet. 01 is reserved. 10/11 are undefined. deblobbed_descriptor.bin says 00 */ + uint8_t reserved1 : 1; /* Reserved. deblobbed_descriptor.bin says 0 */ + uint8_t defaultBootSelection : 2; /* deblobbed_descriptor.bin says 00 (binary). 00 is network boot, then local. 01 is local boot, then network. 10 is network boot only. 11 is local boot only */ + uint8_t reserved2 : 1; /* Reserved. deblobbed_descriptor.bin says 0. */ + uint8_t promptTime : 2; /* deblobbed_descriptor.bin says 00. delay for how long "press ctrl-s" setup prompt message appears. 00 = 2 secs, 01 is 3 secs, 10 is 5 secs, 11 is 0 secs. */ + uint8_t displaySetupMessage : 1; /* default 1 says datasheet. deblobbed_descriptor.bin says 1. if 1, "ctrl-s" setup prompt message appears after the title message. */ + uint8_t reserved3 : 1; /* Datasheet says to set 0. deblobbed_descriptor.bin says 0. */ + uint8_t forceSpeed : 2; /* deblobbed_descriptor.bin says 00. 00 = auto-negotiate, 01 = 10Mbps, 10 = 100Mbps, 11 = "not allowed" */ + uint8_t forceFullDuplex : 1; /* deblobbed_descriptor.bin says 0. Only relevant when bits 10/11 are set; if so, then: 0 = half duplex, 1 = full duplex */ + uint8_t reserved4 : 1; /* Reserved. deblobbed_descriptor.bin says 0. datasheet recommends 0. */ + uint8_t efiPresence : 1; /* 1 means that an EFI image is present (0 means not present). deblobbed_descriptor.bin says 0. if 1, eeprom word 33h (efi version) becomes valid. if pxePresent is 1, that means EFI and PXE are both present.*/ + uint8_t pxePresence : 1; /* 0 means that a PXE image is present. 1 means to pxe present. deblobbed_descriptor.bin says 0. if 0, then word 32h (PXE version) in eeprom becomes valid */ /* most significant bits */ /* This whole data structure is pointless, since libreboot doesn't (read: won't) @@ -224,23 +225,23 @@ struct GBE_PXE_BOOT_AGENT_MAIN_SETUP_OPTIONS { /* Word 31h */ struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_31H { /* least significant bits */ - unsigned char disableSetupMenu : 1; /* 1 means invoking setup menu with ctrl-s won't work. deblobbed_descriptor.bin says 0 (as is default, per datasheet) */ - unsigned char disableTitleMessage : 1; /* 1 means that title in boot agent screen is suppressed, as is ctrl-s message. default is 0, and deblobbed_descriptor.bin says 0 */ - unsigned char disableProtocolSelect : 1; /* 1 means no changes to boot protocol are allowed. default is 0, and deblobbed_descriptor.bin says 0 */ - unsigned char disableBootSelection : 1; /* 1 means no changes in boot order option menu are allowed. default is 0, and deblobbed_descriptor.bin says 0 */ - unsigned char disableLegacyWakeupSupport : 1; /* 1 means no changes in legacy wakeup support menu is allowed. default is 0, and deblobbed_descriptor.bin says 0 */ - unsigned char disableFlashUpdate : 1; /* 1 means no changes to flash image using PROset is allowed. default is 0, and deblobbed_descriptor.bin says 0 */ - unsigned char reserved1 : 2; /* Reserved. Datasheet says these must be 0, and deblobbed_descriptor.bin sets them to 0. */ + uint8_t disableSetupMenu : 1; /* 1 means invoking setup menu with ctrl-s won't work. deblobbed_descriptor.bin says 0 (as is default, per datasheet) */ + uint8_t disableTitleMessage : 1; /* 1 means that title in boot agent screen is suppressed, as is ctrl-s message. default is 0, and deblobbed_descriptor.bin says 0 */ + uint8_t disableProtocolSelect : 1; /* 1 means no changes to boot protocol are allowed. default is 0, and deblobbed_descriptor.bin says 0 */ + uint8_t disableBootSelection : 1; /* 1 means no changes in boot order option menu are allowed. default is 0, and deblobbed_descriptor.bin says 0 */ + uint8_t disableLegacyWakeupSupport : 1; /* 1 means no changes in legacy wakeup support menu is allowed. default is 0, and deblobbed_descriptor.bin says 0 */ + uint8_t disableFlashUpdate : 1; /* 1 means no changes to flash image using PROset is allowed. default is 0, and deblobbed_descriptor.bin says 0 */ + uint8_t reserved1 : 2; /* Reserved. Datasheet says these must be 0, and deblobbed_descriptor.bin sets them to 0. */ /* * deblobbed_descriptor says 000 * 000 = normal behaviour * see datasheet (page 21) for other modes. */ - unsigned char ibaBootOrderSetupMode : 3; + uint8_t ibaBootOrderSetupMode : 3; - unsigned char reserved2 : 3; /* Reserved. Datasheet says these must be set to 0, and deblobbed_descriptor.bin sets them to 0. */ - unsigned char signature : 2; /* Must be set to 01 to indicate that this whole word has been configured by the agent or other software. deblobbed_descriptor.bin says 01. */ + uint8_t reserved2 : 3; /* Reserved. Datasheet says these must be set to 0, and deblobbed_descriptor.bin sets them to 0. */ + uint8_t signature : 2; /* Must be set to 01 to indicate that this whole word has been configured by the agent or other software. deblobbed_descriptor.bin says 01. */ /* most significant bits */ /* This whole data structure is pointless, since libreboot doesn't (read: won't) @@ -249,9 +250,9 @@ struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_31H { /* Word 32h */ struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_32H { /* least significant bits */ - unsigned char buildNumber : 8; /* PXE boot agent build number. default is 28 (hex). deblobbed_descriptor.bin says 18 (hex) */ - unsigned char minorVersionNumber : 4; /* PXE boot agent minor number. default is 2 (hex). deblobbed_descriptor.bin says 3 (hex) */ - unsigned char majorVersionNumber : 4; /* PXE boot agent major number. default is F (hex). deblobbed_descriptor.bin says 1 (hex) */ + uint8_t buildNumber : 8; /* PXE boot agent build number. default is 28 (hex). deblobbed_descriptor.bin says 18 (hex) */ + uint8_t minorVersionNumber : 4; /* PXE boot agent minor number. default is 2 (hex). deblobbed_descriptor.bin says 3 (hex) */ + uint8_t majorVersionNumber : 4; /* PXE boot agent major number. default is F (hex). deblobbed_descriptor.bin says 1 (hex) */ /* most significant bits */ /* This whole data structure is pointless, since libreboot doesn't (read: won't) @@ -260,13 +261,13 @@ struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_32H { /* Word 33h */ struct GBE_PXE_IBA_CAPABILITIES { /* least significant bits */ - unsigned char baseCodePresent : 1; /* 0 means PXE base code is indicated as being present. 1 (default) means not. deblobbed_descriptor.bin says 1 */ - unsigned char undiCapabilityPresent : 1; /* 1 (default) means pxe/undi capability is indicated present. 0 means not present. deblobbed_descriptor.bin says 1 */ - unsigned char reserved1 : 1; /* Reserved. Must be 1. deblobbed_descriptor.bin says 1 */ - unsigned char efiUndiCapabilityPresent : 1; /* EFI UNDI capability present: 0 (default) means not present. 1 means present. deblobbed_descriptor.bin says 0 */ - unsigned char reserved2_0 : 4; /* reserved. all bits must be 0. deblobbed_descriptor.bin sets them to 0. */ - unsigned char reserved2_1 : 6; /* ^ part of reserved2_0. split this way so that the bitfields align */ - unsigned char signature : 2; /* must be 01 to indicate that the word is configured by the agent or other software. deblobbed_descriptor.bin says 01 */ + uint8_t baseCodePresent : 1; /* 0 means PXE base code is indicated as being present. 1 (default) means not. deblobbed_descriptor.bin says 1 */ + uint8_t undiCapabilityPresent : 1; /* 1 (default) means pxe/undi capability is indicated present. 0 means not present. deblobbed_descriptor.bin says 1 */ + uint8_t reserved1 : 1; /* Reserved. Must be 1. deblobbed_descriptor.bin says 1 */ + uint8_t efiUndiCapabilityPresent : 1; /* EFI UNDI capability present: 0 (default) means not present. 1 means present. deblobbed_descriptor.bin says 0 */ + uint8_t reserved2_0 : 4; /* reserved. all bits must be 0. deblobbed_descriptor.bin sets them to 0. */ + uint8_t reserved2_1 : 6; /* ^ part of reserved2_0. split this way so that the bitfields align */ + uint8_t signature : 2; /* must be 01 to indicate that the word is configured by the agent or other software. deblobbed_descriptor.bin says 01 */ /* most significant bits */ /* This whole data structure is pointless, since libreboot doesn't (read: won't) @@ -280,7 +281,7 @@ struct GBE_PXE_SOFTWARE_REGION { struct GBE_PXE_IBA_CAPABILITIES ibaCapabilities; /* Word 33h */ /* Words 34h to 3Eh (padding). Set these to 0xFFFF (according to deblobbed_descriptor.bin) */ - unsigned short paddingWords34hTo3Eh[11]; + uint16_t paddingWords34hTo3Eh[11]; /* * the pxe software region is practically useless in libreboot, since @@ -292,11 +293,11 @@ struct GBE_PXE_SOFTWARE_REGION { }; struct GBEREGIONRECORD_4K { - unsigned char macAddress[6]; /* Word 00 to 02 */ + uint8_t macAddress[6]; /* Word 00 to 02 */ struct GBE_RESERVED_WORD_03H reservedWord03h; /* Reserved word 03. */ - unsigned short reservedWord04h; /* Reserved word 04: set it to 0xFFFF (according to datasheet and deblobbed_descriptor.bin) */ - unsigned short imageVersionInformation; /* Reserved word 05: 83 10 (little endian) in my deblobbed_descriptor.bin. Set this to 0x1083 (in C, assuming little endian byte order). "cannot be changed" according to datasheet */ - unsigned short reservedWords06h07h[2]; /* Reserved words 06-07: set both to 0xFFFF (according to datasheet and deblobbed_descriptor.bin) */ + uint16_t reservedWord04h; /* Reserved word 04: set it to 0xFFFF (according to datasheet and deblobbed_descriptor.bin) */ + uint16_t imageVersionInformation; /* Reserved word 05: 83 10 (little endian) in my deblobbed_descriptor.bin. Set this to 0x1083 (in C, assuming little endian byte order). "cannot be changed" according to datasheet */ + uint16_t reservedWords06h07h[2]; /* Reserved words 06-07: set both to 0xFFFF (according to datasheet and deblobbed_descriptor.bin) */ /* * Word 08 and 09 (pba low and pba high): @@ -313,8 +314,8 @@ struct GBEREGIONRECORD_4K { * * Setting it to FF FF FF FF should be fine, according to the datasheet. */ - unsigned short pbaLow; /* Word 08. Set it to 0x1008 (according to deblobbed_descriptor.bin). */ - unsigned short pbaHigh; /* Word 09. Set it to 0xFFFF (according to deblobbed_descriptor.bin). */ + uint16_t pbaLow; /* Word 08. Set it to 0x1008 (according to deblobbed_descriptor.bin). */ + uint16_t pbaHigh; /* Word 09. Set it to 0xFFFF (according to deblobbed_descriptor.bin). */ /* Word 0A */ struct GBE_PCI_INITIALIZATION_CONTROL_WORD pciInitializationControlWord; @@ -327,7 +328,7 @@ struct GBEREGIONRECORD_4K { * the subsystem id here. Datasheet says that the default value is * 0000h, but you should set this to 20EEh (little endian: EE 20) */ - unsigned short subsystemId; /* Set this to 0x20EE */ + uint16_t subsystemId; /* Set this to 0x20EE */ /* * Word 0C; subsystem vendor ID @@ -337,7 +338,7 @@ struct GBEREGIONRECORD_4K { * the subsystem vendor id here. Datasheet says that the default * value is 8086h, but you should set this to 17AAh (lendian: AA 17). */ - unsigned short subsystemVendorId; /* Set this to 0x17AA */ + uint16_t subsystemVendorId; /* Set this to 0x17AA */ /* * Word 0D: device ID @@ -353,7 +354,7 @@ struct GBEREGIONRECORD_4K { * Based on this, the X200 is shown to have the Intel 82567LM ethernet * controller. */ - unsigned short deviceId; /* Set this to 0x10F5. */ + uint16_t deviceId; /* Set this to 0x10F5. */ /* It is important that this is correct, for the linux kernel driver */ /* @@ -365,11 +366,11 @@ struct GBEREGIONRECORD_4K { * * Intel is often 8086 as a PCI vendor ID. Because 8086. As in the CPU architecture. */ - unsigned short vendorId; + uint16_t vendorId; - unsigned short deviceRevId; /* Word 0F: reserved bits. Set all bits to 0. */ + uint16_t deviceRevId; /* Word 0F: reserved bits. Set all bits to 0. */ struct GBE_LAN_POWER_CONSUMPTION lanPowerConsumption; /* Word 10: LAN Power Consumption (see struct definition) */ - unsigned short reservedWords11h12h[2]; /* Words 11-12: Reserved. Set both of them to 0x0000 (according to datasheet). */ + uint16_t reservedWords11h12h[2]; /* Words 11-12: Reserved. Set both of them to 0x0000 (according to datasheet). */ /* Word 13: Shared Initialization Control Word */ struct GBE_SHARED_INITIALIZATION_CONTROL_WORD sharedInitializationControlWord; @@ -382,27 +383,27 @@ struct GBEREGIONRECORD_4K { /* Word 16: Extended Configuration Control Word 3 */ /* All bits reserved. Datasheet and deblobbed_descriptor.bin say to set it to zero */ - unsigned short extendedConfigurationControlWord3; + uint16_t extendedConfigurationControlWord3; struct LED_CTL_1 ledCtl1; /* Word 17: LED 1 Configuration and Power Management */ struct LED_CTL_02 ledCtl02; /* Word 18: LED 0 and 2 Configuration Defaults */ - unsigned short reservedWord19h; /* Word 19: Reserved. Default is 0x2B00 according to datasheet, but in deblobbed_descriptor.bin it is 0x2B40 */ - unsigned short reservedWord1Ah; /* Word 1A: Reserved. Default is 0x0043 according to datasheet and deblobbed_descriptor.bin */ - unsigned short reservedWord1Bh; /* Word 1B: Reserved. Should be 0x0000 according to datasheet and deblobbed_descriptor.bin */ - unsigned short reservedWord1Ch; /* Word 1C: Reserved. Should be 0x10F5 according to datasheet and deblobbed_descriptor.bin */ - unsigned short reservedWord1Dh; /* Word 1D: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */ - unsigned short _82567lmDeviceId; /* Word 1E: Device ID for Intel 82567LM gigabit ethernet controller (note: X200 uses this). Should be 0x10F5 according to datasheet and deblobbed_descriptor.bin*/ - unsigned short _82567lfDeviceId; /* Word 1F: Device ID for Intel 82567LF gigabit ethernet controller. Should be 0x10BF according to datasheet and deblobbed_descriptor.bin */ - unsigned short reservedWord20h; /* Word 20: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */ - unsigned short _82567vDeviceId; /* Word 21: Device ID for Intel 82567V gigabit ethernet controller. Should be 0x10CB according to datasheet and deblobbed_descriptor.bin */ - unsigned short reservedWord22h; /* Word 22: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */ - unsigned short reservedWord23h; /* Word 23: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */ - unsigned short reservedWords24to2Fh[12]; /* Words 24-2F: Reserved. These should all be 0x0000 according to datasheet and deblobbed_descriptor.bin */ + uint16_t reservedWord19h; /* Word 19: Reserved. Default is 0x2B00 according to datasheet, but in deblobbed_descriptor.bin it is 0x2B40 */ + uint16_t reservedWord1Ah; /* Word 1A: Reserved. Default is 0x0043 according to datasheet and deblobbed_descriptor.bin */ + uint16_t reservedWord1Bh; /* Word 1B: Reserved. Should be 0x0000 according to datasheet and deblobbed_descriptor.bin */ + uint16_t reservedWord1Ch; /* Word 1C: Reserved. Should be 0x10F5 according to datasheet and deblobbed_descriptor.bin */ + uint16_t reservedWord1Dh; /* Word 1D: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */ + uint16_t _82567lmDeviceId; /* Word 1E: Device ID for Intel 82567LM gigabit ethernet controller (note: X200 uses this). Should be 0x10F5 according to datasheet and deblobbed_descriptor.bin*/ + uint16_t _82567lfDeviceId; /* Word 1F: Device ID for Intel 82567LF gigabit ethernet controller. Should be 0x10BF according to datasheet and deblobbed_descriptor.bin */ + uint16_t reservedWord20h; /* Word 20: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */ + uint16_t _82567vDeviceId; /* Word 21: Device ID for Intel 82567V gigabit ethernet controller. Should be 0x10CB according to datasheet and deblobbed_descriptor.bin */ + uint16_t reservedWord22h; /* Word 22: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */ + uint16_t reservedWord23h; /* Word 23: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */ + uint16_t reservedWords24to2Fh[12]; /* Words 24-2F: Reserved. These should all be 0x0000 according to datasheet and deblobbed_descriptor.bin */ struct GBE_PXE_SOFTWARE_REGION pxeSoftwareRegion; /* Words 30-3E: PXE Software Region */ - unsigned short checkSum; /* when added to the sum of all words above, this should match GBECHECKSUMTOTAL */ + uint16_t checkSum; /* when added to the sum of all words above, this should match GBECHECKSUMTOTAL */ /* set all bytes in here to 0xFF */ - unsigned char padding[3968]; + uint8_t padding[3968]; }; /* main and backup region in gbe */ @@ -423,9 +424,9 @@ struct GBEREGIONRECORD_8K { * --------------------------------------------------------------------- */ -unsigned short gbeGetRegionWordFrom8kBuffer(int index, char* regionData); -unsigned short gbeGetChecksumFrom8kBuffer(char* regionData, unsigned short desiredValue, int byteOffset); -unsigned short gbeGetChecksumFrom4kStruct(struct GBEREGIONRECORD_4K gbeStruct4k, unsigned short desiredValue); +uint16_t gbeGetRegionWordFrom8kBuffer(int index, uint8_t* regionData); +uint16_t gbeGetChecksumFrom8kBuffer(uint8_t* regionData, uint16_t desiredValue, int byteOffset); +uint16_t gbeGetChecksumFrom4kStruct(struct GBEREGIONRECORD_4K gbeStruct4k, uint16_t desiredValue); struct GBEREGIONRECORD_8K deblobbedGbeStructFromFactory(struct GBEREGIONRECORD_8K factoryGbeStruct8k); int notCreatedHFileForGbeCFile(char* outFileName, char* cFileName); int notCreatedCFileFromGbeStruct4k(struct GBEREGIONRECORD_4K gbeStruct4k, char* outFileName, char* headerFileName); diff --git a/resources/utilities/ich9deblob/src/ich9deblob.c b/resources/utilities/ich9deblob/src/ich9deblob.c index 3606686..d025a64 100644 --- a/resources/utilities/ich9deblob/src/ich9deblob.c +++ b/resources/utilities/ich9deblob/src/ich9deblob.c @@ -47,13 +47,13 @@ #include "ich9deblob.h" -int main(int argc, char *argv[]) +int main() { /* * descriptor region. Will have an actual descriptor struct mapped to it (from the factory.rom dump) * and then it will be modified (deblobbed) to remove the ME/AMT */ - char factoryDescriptorBuffer[DESCRIPTORREGIONSIZE]; + uint8_t factoryDescriptorBuffer[DESCRIPTORREGIONSIZE]; struct DESCRIPTORREGIONRECORD factoryDescriptorStruct; struct DESCRIPTORREGIONRECORD deblobbedDescriptorStruct; @@ -61,7 +61,7 @@ int main(int argc, char *argv[]) * gbe region. Well have actual gbe buffer mapped to it (from the factory.rom dump) * and then it will be modified to correct the main region */ - char factoryGbeBuffer8k[GBEREGIONSIZE_8K]; + uint8_t factoryGbeBuffer8k[GBEREGIONSIZE_8K]; struct GBEREGIONRECORD_8K factoryGbeStruct8k; struct GBEREGIONRECORD_8K deblobbedGbeStruct8k; @@ -69,7 +69,7 @@ int main(int argc, char *argv[]) * Used to store the location of the Gbe * region inside the factory.rom image. */ - unsigned int factoryGbeRegionStart; + uint32_t factoryGbeRegionStart; /* names of the files that this utility will handle */ char* factoryRomFilename = "factory.rom"; /* user-supplied factory.bin dump (original firmware) */ @@ -109,7 +109,7 @@ int main(int argc, char *argv[]) * Get the descriptor region dump from the factory.rom * (goes in factoryDescriptorBuffer variable) */ - bufferLength = fread(factoryDescriptorBuffer, sizeof(char), DESCRIPTORREGIONSIZE, fileStream); + bufferLength = fread(factoryDescriptorBuffer, 1, DESCRIPTORREGIONSIZE, fileStream); if (DESCRIPTORREGIONSIZE != bufferLength) // { printf("\nerror: could not read descriptor from factory.rom (%i) bytes read\n", bufferLength); @@ -149,7 +149,7 @@ int main(int argc, char *argv[]) */ fseek(fileStream, factoryGbeRegionStart, SEEK_SET); /* Read the gbe data from the factory.rom and put it in factoryGbeBuffer8k */ - bufferLength = fread(factoryGbeBuffer8k, sizeof(char), GBEREGIONSIZE_8K, fileStream); + bufferLength = fread(factoryGbeBuffer8k, 1, GBEREGIONSIZE_8K, fileStream); if (GBEREGIONSIZE_8K != bufferLength) { printf("\nerror: could not read GBe region from factory.rom (%i) bytes read\n", bufferLength); diff --git a/resources/utilities/ich9deblob/src/ich9deblob.h b/resources/utilities/ich9deblob/src/ich9deblob.h index a765bb5..490d2f3 100644 --- a/resources/utilities/ich9deblob/src/ich9deblob.h +++ b/resources/utilities/ich9deblob/src/ich9deblob.h @@ -26,12 +26,13 @@ #include <stdio.h> #include <string.h> +#include <stdint.h> #include "common/descriptor_gbe.h" /* common descriptor/gbe functions used by ich9deblob */ #include "common/x86compatibility.h" /* system/compiler compatibility checks. This code is not portable. */ #include "descriptor/descriptor.h" /* structs describing what's in the descriptor region */ #include "gbe/gbe.h" /* structs describing what's in the gbe region */ -int main(int argc, char *argv[]); +int main(); #endif diff --git a/resources/utilities/ich9deblob/src/ich9gen.c b/resources/utilities/ich9deblob/src/ich9gen.c index ad43a9d..998dcf2 100644 --- a/resources/utilities/ich9deblob/src/ich9gen.c +++ b/resources/utilities/ich9deblob/src/ich9gen.c @@ -23,7 +23,7 @@ int main(int argc, char *argv[]) { int i, j; - unsigned char customMacAddress[6]; /* Only set/used if the user wants to */ + uint8_t customMacAddress[6]; /* Only set/used if the user wants to */ struct GBEREGIONRECORD_8K gbeStruct8k = generatedGbeStruct8k(); struct DESCRIPTORREGIONRECORD descriptorStruct4M = generatedDescriptorStructRom4M(); @@ -74,11 +74,11 @@ int main(int argc, char *argv[]) /* Go through each nibble of the byte */ for(j=0; j<2; j++) { if(argv[2][(i*3)+j]>='a' && argv[2][(i*3)+j]<='f') - customMacAddress[i] |= (argv[2][(i*3)+j] - 87) << ((j^1) << 2); + customMacAddress[i] |= (uint8_t)((argv[2][(i*3)+j] - 87) << ((j^1) << 2)); else if(argv[2][(i*3)+j]>='A' && argv[2][(i*3)+j]<='F') - customMacAddress[i] |= (argv[2][(i*3)+j] - 55) << ((j^1) << 2); + customMacAddress[i] |= (uint8_t)((argv[2][(i*3)+j] - 55) << ((j^1) << 2)); else if(argv[2][(i*3)+j]>='0' && argv[2][(i*3)+j]<='9') - customMacAddress[i] |= (argv[2][(i*3)+j] - 48) << ((j^1) << 2); + customMacAddress[i] |= (uint8_t)((argv[2][(i*3)+j] - 48) << ((j^1) << 2)); else { printf("ich9gen: invalid mac address format (non-hex characters)\n"); return 1; diff --git a/resources/utilities/ich9deblob/src/ich9gen.h b/resources/utilities/ich9deblob/src/ich9gen.h index 287a66e..25cf340 100644 --- a/resources/utilities/ich9deblob/src/ich9gen.h +++ b/resources/utilities/ich9deblob/src/ich9gen.h @@ -22,6 +22,7 @@ #include <stdio.h> #include <string.h> +#include <stdint.h> #include "ich9gen/mkdescriptor.h" #include "ich9gen/mkgbe.h" diff --git a/resources/utilities/ich9deblob/src/ich9gen/mkdescriptor.h b/resources/utilities/ich9deblob/src/ich9gen/mkdescriptor.h index c4bbe69..745f11f 100644 --- a/resources/utilities/ich9deblob/src/ich9gen/mkdescriptor.h +++ b/resources/utilities/ich9deblob/src/ich9gen/mkdescriptor.h @@ -20,6 +20,7 @@ #include <stdio.h> #include <string.h> +#include <stdint.h> #include "../descriptor/descriptor.h" /* ROM image sizes in bytes */ diff --git a/resources/utilities/ich9deblob/src/ich9gen/mkgbe.h b/resources/utilities/ich9deblob/src/ich9gen/mkgbe.h index 5c67d83..b7be8b3 100644 --- a/resources/utilities/ich9deblob/src/ich9gen/mkgbe.h +++ b/resources/utilities/ich9deblob/src/ich9gen/mkgbe.h @@ -20,6 +20,7 @@ #include <stdio.h> #include <string.h> +#include <stdint.h> #include "../gbe/gbe.h" struct GBEREGIONRECORD_4K generatedGbeStruct4k(); |