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authorFrancis Rowe <info@gluglug.org.uk>2014-12-25 22:37:55 (EST)
committer Francis Rowe <info@gluglug.org.uk>2014-12-25 22:37:55 (EST)
commit1429394e079e9f6cce16cf92aaa7388bf959aad9 (patch)
treec42b62daf3a53a3314cc1692fcadee5f06113466 /resources/utilities/ich9deblob
parent3b2b032956ddd677f8b481f55df5898318e20c47 (diff)
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ich9deblob: gbe struct: info about word 0E (vendor ID)
Diffstat (limited to 'resources/utilities/ich9deblob')
-rw-r--r--resources/utilities/ich9deblob/src/gbe/gbe.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/resources/utilities/ich9deblob/src/gbe/gbe.h b/resources/utilities/ich9deblob/src/gbe/gbe.h
index 392efff..460df5a 100644
--- a/resources/utilities/ich9deblob/src/gbe/gbe.h
+++ b/resources/utilities/ich9deblob/src/gbe/gbe.h
@@ -152,7 +152,17 @@ struct GBEREGIONRECORD_4K {
unsigned short deviceId; /* Set this to 0x10F5. */
/* It is important that this is correct, for the linux kernel driver */
+ /*
+ * Word 0E: vendor ID
+ *
+ * If load vendor/device ID in word 0A (pci init control) is 1 (it is),
+ * then this word used read to initialize the PCI vendor ID. Default
+ * value is 8086 according to datasheets, and deblobbed_descriptor.bin.
+ *
+ * Intel is often 8086 as a PCI vendor ID. Because 8086. As in the CPU architecture.
+ */
unsigned short vendorId;
+
unsigned short deviceRevId;
unsigned short lanPowerConsumption;
unsigned short reserved6;