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authorFrancis Rowe <info@gluglug.org.uk>2015-05-11 07:59:18 (EDT)
committer Francis Rowe <info@gluglug.org.uk>2015-05-11 07:59:18 (EDT)
commit0751832f55922bc9a463997b121713dbed907b36 (patch)
tree8f50e7e278cd4a4dc333ddcfd02b55458c273874 /docs
parentc3ed03fffee2327c2f80762a8b019989237e75aa (diff)
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docs/install/bbb_setup.html: Add info about wp/hold and pinouts
Diffstat (limited to 'docs')
-rw-r--r--docs/install/bbb_setup.html26
-rw-r--r--docs/tasks.html40
2 files changed, 26 insertions, 40 deletions
diff --git a/docs/install/bbb_setup.html b/docs/install/bbb_setup.html
index 0c51251..d1a4e3d 100644
--- a/docs/install/bbb_setup.html
+++ b/docs/install/bbb_setup.html
@@ -297,6 +297,21 @@ Note: flashrom can never write if the flash chip isn't found automatically.
18 - - 3.3V PSU RED
22 - - NC - this is pin 1 on the flash chip
<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i>
+
+You may also need to connect pins 1 and 9 (tie to 3.3V supply). These are HOLD# and WP#.
+On some systems they are held high, if the flash chip is attached to the board.
+If you're flashing a chip that isn't connected to a board, you'll almost certainly
+have to connect them.
+
+SOIC16 pinout (more info available online, or in the datasheet for your flash chip):
+HOLD 1-16 SCK
+VDD 2-15 MOSI
+N/C 3-14 N/C
+N/C 4-13 N/C
+N/C 5-12 N/C
+N/C 6-11 N/C
+SS 7-10 GND
+MISO 8-9 WP
</pre>
<p>
The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250):
@@ -307,6 +322,17 @@ Note: flashrom can never write if the flash chip isn't found automatically.
NC - - 21
3.3V PSU RED - - 17 - this is pin 1 on the flash chip
<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i>
+
+You may also need to connect pins 3 and 7 (tie to 3.3V supply). These are HOLD# and WP#.
+On some systems they are held high, if the flash chip is attached to the board.
+If you're flashing a chip that isn't connected to a board, you'll almost certainly
+have to connect them.
+
+SOIC8 pinout (more info available online, or in the datasheet for your flash chip):
+SS 1-8 VDD
+MISO 2-7 HOLD
+WP 3-6 SCK
+GND 4-5 MOSI
</pre>
<p>
<b>NC = no connection</b>
diff --git a/docs/tasks.html b/docs/tasks.html
index 5ce2bc9..f59a585 100644
--- a/docs/tasks.html
+++ b/docs/tasks.html
@@ -253,46 +253,6 @@
Get them for the following remaining boards: X60, T60, macbook21, R400
</li>
<li>
- Apparently, leaving HOLD and WP pins floating (unconnected) isn't a good idea.
- Information online says that this needs to be connected along with 3.3V - look into this.
- (it is specific to each flash chip, so read the datasheets).
- <ul>
- <li>
- eg http://flashrom.org/FT2232SPI_Programmer -
- &quot; The WP# and HOLD# pins should be tied to VCC! If you leave them unconnected you'll likely experience strange issues.&quot;
- </li>
- <li>
- &lt;pehjota&gt; stefanct: We've never had any &quot;strange issues&quot; with leaving WP# and HOLD#
- unconnected on the Macronix and Atmel SOIC-8 and SOIC-16 flash chips on the X200.
- IIRC, the datasheets don't say how those pins are wired internally or whether they can
- be left unconnected. But I tested their voltages while flashing, and they float high
- on their own, so they seem to support it fine.
- </li>
- <li>
- &lt;pehjota&gt; fchmmr: You would connect the WP# and HOLD# pins to 3.3 V (on an ATX PSU you'd
- hook up more cables to the other orange pins, with your PSU I guess you'd wrap more wires
- around the 3.3-V screw), just like you do VCC. But as I said above, it doesn't seem to
- be necessary (WP# and HOLD# seem to be held high already).<br/>
- &lt;pehjota&gt; I got a solid ~3.3 V (i.e. pulled high, not floating between high and low)
- from WP# and HOLD# with just VCC, GND, MOSI, MISO, CS#, and SCLK connected. Plus, we haven't
- had any write protection issues as I'd expect from floating WP# and HOLD#, AFAIK.<br/>
- &lt;pehjota&gt; fchmmr: These pins do nothing if they're held high. The "#" (not) means they cause different behavior when held low.
- </li>
- <li>
- &lt;stefanct&gt; fchmmr: pehjota: it may not be a problem if the chip is soldered to the x200, but it surely is when it isnt.
- </li>
- <li>
- &lt;stefanct&gt; yes...
- &lt;stefanct&gt; a small note noting that would be appreciated because there are enough people out there already that ignore those pins and get stuck
- &gt;pehjota&gt; stefanct: You mean a note in the libreboot documentation explaining why we don't have to connect HOLD# and WP# to anything and how they would have to be tied to VCC on a chip not soldered to a board?
- &lt;Kamilion&gt; How about a more useful note that explains the whole discussion you two had succinctly?
- &lt;Kamilion&gt; Not everyone is going to be an EE to know about the # indicating the pin should be pulled low to be active.
- &lt;Kamilion&gt; reminds me, I need to pull out my pomona and try to fix some intel NIC roms
- &lt;stefanct&gt; pehjota: yes
- </li>
- </ul>
- </li>
- <li>
Adapt the notes at <a href="install/bbb_setup.html#stability">install/bbb_setup.html#stability</a>
into a full guide.
</li>