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| author | Francis Rowe <info@gluglug.org.uk> | 2015-02-04 04:14:49 (EST) |
|---|---|---|
| committer | Francis Rowe <info@gluglug.org.uk> | 2015-02-04 04:14:49 (EST) |
| commit | 4c3d46238022f0c9955ae7e8b10c9f1716dd871a (patch) | |
| tree | 8639e21d93df6493d952bda5f324efbe4d89447f /docs/future | |
| parent | 5b6f5884280657c8554035503ee2bde5d84a276c (diff) | |
| download | libreboot-4c3d46238022f0c9955ae7e8b10c9f1716dd871a.zip libreboot-4c3d46238022f0c9955ae7e8b10c9f1716dd871a.tar.gz libreboot-4c3d46238022f0c9955ae7e8b10c9f1716dd871a.tar.bz2 | |
Documentation: implement theme, drastically improve readability
Diffstat (limited to 'docs/future')
| -rw-r--r-- | docs/future/index.html | 707 | ||||
| -rw-r--r-- | docs/future/old.html | 420 |
2 files changed, 585 insertions, 542 deletions
diff --git a/docs/future/index.html b/docs/future/index.html index 6f05022..450e85a 100644 --- a/docs/future/index.html +++ b/docs/future/index.html @@ -16,199 +16,333 @@ <body> - <header> - <h1 id="pagetop">Development notes</h1> - <aside>These are development notes, for future use. For old (obselete) notes, see <a href="old.html">old.html</a>.</aside> - </header> - - <p> - Or go <a href="../index.html">back to main document index</a>. - </p> + <div class="section"> -<hr/> + <h1 id="pagetop">Development notes</h1> + <p> + These are development notes, for future use. For old (obselete) notes, see <a href="old.html">old.html</a>. + </p> + <p> + Or go <a href="../index.html">back to main document index</a>. + </p> + + </div> - <h2>Contents</h2> - <ul> - <li><a href="#standard_test">Standard test</a></li> - <li><a href="#t60_cpu_microcode">T60 cpu microcode</a></li> - <li><a href="#i945_vram_size">i945 VRAM size</a></li> - <li><a href="#lcd_i945_incompatibility">LCD panels on i945 - fix incompatible panels</a></li> - <li><a href="#i945_vbt">i945 X60/T60 VBT implementation (experimental: testing)</a></li> - <li><a href="#intelvbttool_results">IntelVbtTool results</a></li> - <li><a href="#fallback_patches">Fallback patches for i945</a></li> - </ul> + <div class="section"> + + <h1>Table of contents</h1> + <ul> + <li><a href="#standard_test">Standard test</a></li> + <li><a href="#t60_cpu_microcode">T60 cpu microcode</a></li> + <li><a href="#i945_vram_size">i945 VRAM size</a></li> + <li><a href="#lcd_i945_incompatibility">LCD panels on i945 - fix incompatible panels</a></li> + <li><a href="#i945_vbt">i945 X60/T60 VBT implementation (experimental: testing)</a></li> + <li><a href="#intelvbttool_results">IntelVbtTool results</a></li> + <li><a href="#fallback_patches">Fallback patches for i945</a></li> + </ul> + + </div> -<hr/> + <div class="section"> + + <h1 id="standard_test">standard test</h1> + <p> + These logs are usually obtained when testing changes related to graphics on i945 (X60 and T60). + </p> + <ul> + <li> + Make a copy of these files: + <ul> + <li>/var/log/dmesg</li> + <li>/var/log/kern.log</li> + <li>/var/log/Xorg.0.log</li> + <li>/proc/ioports</li> + <li>/proc/iomem</li> + <li>/sys/class/drm/card0/error</li> + </ul> + </li> + <li> + Record these outputs: + <ul> + <li>sudo intel_reg_dumper</li> + <li>uname -r</li> + <li>lspci -vvvvnnnnxxxx</li> + <li>sudo modprobe msr</li> + <li>sudo inteltool -a</li> + <li>sudo cbmem -c</li> + </ul> + </li> + <li> + Try some 3D games with latest kernel. + </li> + </ul> - <h1 id="standard_test">standard test</h1> - <p> - These logs are usually obtained when testing changes related to graphics on i945 (X60 and T60). - </p> - <ul> - <li> - Make a copy of these files: + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="t60_cpu_microcode">T60 cpu microcode</h1> + + <p> + TODO: T60: find (for rare buggy CPUs that are unstable without microcode updates) if there is a workaround (patched kernel, special parameter, etc) So far, only 1 processor has been found to have issues. See microcode errata sheets http://download.intel.com/design/mobile/SPECUPDT/31407918.pdf and http://download.intel.com/design/mobile/SPECUPDT/30922214.pdf and then look at the debugging results collected in <a href="../t7200q">t7200q</a> directory (q means quirk). + </p> + + <p> + Every other T7200 tested so far has worked without microcode updates. + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="i945_vram_size">i945 VRAM size</h1> + + <p> + Apparently, only 8MB VRAM is available on i945 GPUs (though it could do 64MB):<br/> + phcoder: No. Hardware default is 8 MiB. When I wanted to make it configurable, I saw that docs mention only one other alternative: 1MiB. Later isn't event enough for 1024x768 at 24bpp without any acceleration or double buffering. It's possible that there are undocumented values. Which options do you have in vendor BIOS? + How to find out how much vram you have:<br/> + phcoder: TOM - BSM<br/> + phcoder: check what vendor BIOS offers as options<br/> + fchmmr: I thought it could do 64MB usually<br/> + phcoder: not accorging to doc.<br/> + phcoder: see mobile-945-express-chipset-datasheet page 93<br/> + phcoder: see also src/northbridge/intel/i945/{early_init,northbridge,gma}.c<br/> + fchmmr: "011 = DVMT (UMA) mode, 8 MB of memory pre-allocated for<br/> + fchmmr: frame buffer."<br/> + fchmmr: "Others - reserved"<br/> + phcoder: the easiest way is a loop at this position which tries different values and reads (and prints) BSM with them<br/> + stefanct: fchmmr: he suggest that you change the value and look how BSM reacts to that<br/> + stefanct: as he pointed out earlier vram size = TOM - BSM<br/> + stefanct: different values of GMS<br/> + stefanct: phcoder: hm... this could be a hint. look at the text description of TOLUD at page 103<br/> + stefanct: it mentions 64 MB in the text about BSM as well<br/> + stefanct: table 18...<br/> + phcoder: stefanct: I have a guess which value make is 64 but I will not tell to avoid skewing test results<br/> + stefanct: phcoder: sure... i assumed you were not sure if it supports it at all. testing it properly is of course a good idea :)<br/> + stefanct: test the various possible (but reserved) values of GMS and see what the resulting VRAM size is<br/> + fchmmr: so, TOM - BSM + </p> + <p> + <a href="#pagetop">Back to top of page.</a> + </p> + + </div> + + <div class="section"> + + <h1 id="lcd_i945_incompatibility">LCD panels on i945 - fix incompatible panels</h1> + + <p> + Fix T60 issues (see incompatible panels listed at <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a>). + </p> + + <p> + Run that tool (resources/utilities/i945gpu/intel-regs.py) as root on machines with the offending panels in: + </p> <ul> - <li>/var/log/dmesg</li> - <li>/var/log/kern.log</li> - <li>/var/log/Xorg.0.log</li> - <li>/proc/ioports</li> - <li>/proc/iomem</li> - <li>/sys/class/drm/card0/error</li> + <li>Coreboot (or libreboot, whatever) with VBIOS (disable native graphics also)</li> + <li>(Factory BIOS also?)</li> </ul> - </li> - <li> - Record these outputs: + + <p> + This shows values in devicetree.cb and src/northbridge/intel/i945/gma.c, the idea is that you run it on factory bios or vbios + and that it will (might) show different values: then you try those in the native graphics (in libreboot). + </p> + + <p> + Other values/registers might also need to be added to the script for these tests. + </p> + + <p> + check if intel_bios_reader from intel-gpu-tools reports the same value (BIOS has a hardcoded value) for PWM modulation frequency. + This file can read the VBIOS (64K dump). + </p> + + <p> + Check other tools in intel-gpu-tools aswell, compare outputs. Possibly add more information to intel-regs.py output (submit changes to mtjm). + Do oprom trace / replay (<a href="http://www.coreboot.org/User:GNUtoo#How_to_get_rid_of_the_vbios_of_the_x60_.5BNew_Version.5D">http://www.coreboot.org/User:GNUtoo#How_to_get_rid_of_the_vbios_of_the_x60_.5BNew_Version.5D</a>) + </p> + + <p> + Study how EDID works and how gma.c handles it. + </p> + + <p> + Original getregs.py script can be found at <a href="http://hg.mtjm.eu/scripts/file/tip/intel-regs.py">http://hg.mtjm.eu/scripts/file/tip/intel-regs.py</a> + written by Michał Masłowski. + </p> + + <p> + About fixing remaining LCD panels on 5345:<br/> + 'polarity' is mentioned in coreboot log (cbmem -c). compare output (with working and non-working panel). (and see the other notes in docs/future/index.html)<br/> + phcoder says: hint for T60: it might be that failing panels are 8bpc<br/> + fchmmr: what does 8bpc mean? And what do you think the other (non-failing) panel are?<br/> + phcoder: 6bpc. bits per colour. May also be reffered as 18-bit vs 24-bit panels<br/> + phcoder: just collect EDIDs from failing and working panels<br/> + <b>phcoder gave me this for collecting EDID data: + <a href="http://www.o2genum.com/2013/08/lp156wh2-tlaa-lcd-panel-edid.html">http://www.o2genum.com/2013/08/lp156wh2-tlaa-lcd-panel-edid.html</a></b> + </p> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="i945_vbt">i945 gfx: X60/T60 VBT implementation (experimental: testing)</h1> + + <p> + intel_bios_dumper in intel-gpu-tools seems interesting. + </p> + <p> + <b>Use 'drm.debug=0x06' kernel parameter when booting in grub!</b> + </p> + <p> + Before each test run, boot a live USB and delete the old logs in /var/log (kernel log, xorg log, dmesg and so on). + </p> + <p> + Load (from the ROM) the runningvga.bin for each LCD panel on each machine; do not execute it, only load it! (coreboot will have to be modified). + Rename the ROM appropriately, based on the machine name and the panel name. coreboot_nativegfx_5868_plusrunningvga_t60_14_LTD141ECMB.rom, + for instance. Keep a copy for later use. + </p> + + <p>You are supposed to:</p> <ul> - <li>sudo intel_reg_dumper</li> - <li>uname -r</li> - <li>lspci -vvvvnnnnxxxx</li> - <li>sudo modprobe msr</li> - <li>sudo inteltool -a</li> - <li>sudo cbmem -c</li> + <li>enable native graphics in menuconfig</li> + <li>include the self-modified VGA ROM (load, but not execute) - for reverse engineering the correct VBT tables.</li> </ul> - </li> - <li> - Try some 3D games with latest kernel. - </li> - </ul> - - <p><a href="#pagetop">Back to top of page.</a></p> - -<hr/> - - <h1 id="t60_cpu_microcode">T60 cpu microcode</h1> - - <p> - TODO: T60: find (for rare buggy CPUs that are unstable without microcode updates) if there is a workaround (patched kernel, special parameter, etc) So far, only 1 processor has been found to have issues. See microcode errata sheets http://download.intel.com/design/mobile/SPECUPDT/31407918.pdf and http://download.intel.com/design/mobile/SPECUPDT/30922214.pdf and then look at the debugging results collected in <a href="../t7200q">t7200q</a> directory (q means quirk). - </p> - - <p> - Every other T7200 tested so far has worked without microcode updates. - </p> - - <p><a href="#pagetop">Back to top of page.</a></p> - -<hr/> - - <h1 id="i945_vram_size">i945 VRAM size</h1> - <p> - Apparently, only 8MB VRAM is available on i945 GPUs (though it could do 64MB):<br/> - phcoder: No. Hardware default is 8 MiB. When I wanted to make it configurable, I saw that docs mention only one other alternative: 1MiB. Later isn't event enough for 1024x768 at 24bpp without any acceleration or double buffering. It's possible that there are undocumented values. Which options do you have in vendor BIOS? - How to find out how much vram you have:<br/> - phcoder: TOM - BSM<br/> - phcoder: check what vendor BIOS offers as options<br/> - fchmmr: I thought it could do 64MB usually<br/> - phcoder: not accorging to doc.<br/> - phcoder: see mobile-945-express-chipset-datasheet page 93<br/> - phcoder: see also src/northbridge/intel/i945/{early_init,northbridge,gma}.c<br/> - fchmmr: "011 = DVMT (UMA) mode, 8 MB of memory pre-allocated for<br/> - fchmmr: frame buffer."<br/> - fchmmr: "Others - reserved"<br/> - phcoder: the easiest way is a loop at this position which tries different values and reads (and prints) BSM with them<br/> - stefanct: fchmmr: he suggest that you change the value and look how BSM reacts to that<br/> - stefanct: as he pointed out earlier vram size = TOM - BSM<br/> - stefanct: different values of GMS<br/> - stefanct: phcoder: hm... this could be a hint. look at the text description of TOLUD at page 103<br/> - stefanct: it mentions 64 MB in the text about BSM as well<br/> - stefanct: table 18...<br/> - phcoder: stefanct: I have a guess which value make is 64 but I will not tell to avoid skewing test results<br/> - stefanct: phcoder: sure... i assumed you were not sure if it supports it at all. testing it properly is of course a good idea :)<br/> - stefanct: test the various possible (but reserved) values of GMS and see what the resulting VRAM size is<br/> - fchmmr: so, TOM - BSM - </p> - <p> - <a href="#pagetop">Back to top of page.</a> - </p> - -<hr/> - - <h1 id="lcd_i945_incompatibility">LCD panels on i945 - fix incompatible panels</h1> - - <p> - Fix T60 issues (see incompatible panels listed at <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a>). - </p> + <p> + With each boot, make notes about what you see and get logs using the <a href="#standard_test">standard test</a>. + You will need the files from <a href="#intelvbttool_results">#intelvbttool_results</a> for each machine. + </p> - <p> - Run that tool (resources/utilities/i945gpu/intel-regs.py) as root on machines with the offending panels in: - </p> - <ul> - <li>Coreboot (or libreboot, whatever) with VBIOS (disable native graphics also)</li> - <li>(Factory BIOS also?)</li> - </ul> - - <p> - This shows values in devicetree.cb and src/northbridge/intel/i945/gma.c, the idea is that you run it on factory bios or vbios - and that it will (might) show different values: then you try those in the native graphics (in libreboot). - </p> + Results (# means untested): + <ul> + <li> + <b>X60/X60s:</b> + <ul> + <li>TMD-Toshiba LTD121ECHB: #</li> + <li>CMO N121X5-L06: #</li> + <li>Samsung LTN121XJ-L07: #</li> + <li>BOE-Hydis HT121X01-101: #</li> + </ul> + </li> + <li> + <b>X60T XGA:</b> + <ul> + <li>BOE-Hydis HV121X03-100: #</li> + </ul> + </li> + <li> + <b>X60T SXGA+:</b> + <ul> + <li>BOE-Hydis HV121P01-100: #</li> + </ul> + </li> + <li> + <b>T60 14" XGA:</b> + <ul> + <li>Samsung LTN141XA-L01: #</li> + <li>CMO N141XC: #</li> + <li>BOE-Hydis HT14X14: #</li> + <li>TMD-Toshiba LTD141ECMB: #</li> + </ul> + </li> + <li> + <b>T60 14" SXGA+</b> + <ul> + <li>TMD-Toshiba LTD141EN9B: #</li> + <li>Samsung LTN141P4-L02: #</li> + <li>Boe-Hydis HT14P12: #</li> + </ul> + </li> + <li> + <b>T60 15" XGA</b> + <ul> + <li>Samsung LTN150XG-L08: #</li> + <li>LG-Philips LP150X09: #</li> + <li>13N7068 (IDtech): #</li> + <li>13N7069 (CMO): #</li> + + </ul> + </li> + <li> + <b>T60 15" SXGA+</b> + <ul> + <li>LG-Philips LP150E05-A2K1: #</li> + <li>BOE-Hydis HV150P01-100: #</li> + </ul> + </li> + <li> + <b>T60 15" UXGA</b> + <ul> + <li>BOE-Hydis HV150UX1-100: #</li> + <li>IDTech N150U3-L01: #</li> + <li>BOE-Hydis HV150UX1-102: #</li> + </ul> + </li> + <li> + <b>T50 15" QXGA</b> + <ul> + <li>IDtech IAQX10N: #</li> + <li>IDtech IAQX10S: #</li> + </ul> + </li> + </ul> - <p> - Other values/registers might also need to be added to the script for these tests. - </p> + <p><a href="#pagetop">Back to top of page</a></p> + + </div> - <p> - check if intel_bios_reader from intel-gpu-tools reports the same value (BIOS has a hardcoded value) for PWM modulation frequency. - This file can read the VBIOS (64K dump). - </p> + <div class="section"> - <p> - Check other tools in intel-gpu-tools aswell, compare outputs. Possibly add more information to intel-regs.py output (submit changes to mtjm). - Do oprom trace / replay (<a href="http://www.coreboot.org/User:GNUtoo#How_to_get_rid_of_the_vbios_of_the_x60_.5BNew_Version.5D">http://www.coreboot.org/User:GNUtoo#How_to_get_rid_of_the_vbios_of_the_x60_.5BNew_Version.5D</a>) - </p> + <h1 id="intelvbttool_results">intelvbttool test results (VGA ROM dumps)</h1> + <p> + The VBIOS on i945 (intel gpu) platforms is self-modifying; that is, + its contents change when you run it. intelvbttool takes a dump of + the currently running vbios, and parses it. + </p> - <p> - Study how EDID works and how gma.c handles it. - </p> - - <p> - Original getregs.py script can be found at <a href="http://hg.mtjm.eu/scripts/file/tip/intel-regs.py">http://hg.mtjm.eu/scripts/file/tip/intel-regs.py</a> - written by Michał Masłowski. - </p> + <p> + The idea is that we can extract the VBT tables using this knowledge, on the X60, X60 Tablet and T60 (Intel GPU). + </p> - <p> - About fixing remaining LCD panels on 5345:<br/> - 'polarity' is mentioned in coreboot log (cbmem -c). compare output (with working and non-working panel). (and see the other notes in docs/future/index.html)<br/> - phcoder says: hint for T60: it might be that failing panels are 8bpc<br/> - fchmmr: what does 8bpc mean? And what do you think the other (non-failing) panel are?<br/> - phcoder: 6bpc. bits per colour. May also be reffered as 18-bit vs 24-bit panels<br/> - phcoder: just collect EDIDs from failing and working panels<br/> - <b>phcoder gave me this for collecting EDID data: - <a href="http://www.o2genum.com/2013/08/lp156wh2-tlaa-lcd-panel-edid.html">http://www.o2genum.com/2013/08/lp156wh2-tlaa-lcd-panel-edid.html</a></b> - </p> + <p> + Here is an example of how VBT was implemented on the ThinkPad X230: + <a href="http://review.coreboot.org/#/c/5396">http://review.coreboot.org/#/c/5396</a>. + </p> - <p><a href="#pagetop">Back to top of page.</a></p> + <p> + You'll need to build a T60 ROM with SeaBIOS and the VGA ROM (for Intel GPU). An X60 ROM is also needed (same configuration, using the VGA ROM for X60). + </p> -<hr/> + <p> + T60 has DVI on its dock, make sure that the dock is attached when getting this output. + </p> - <h1 id="i945_vbt">i945 gfx: X60/T60 VBT implementation (experimental: testing)</h1> + <p> + Get intelvbttool here: <a href="http://review.coreboot.org/#/c/5842">http://review.coreboot.org/#/c/5842</a> (util/intelvbttool). + </p> - <p> - intel_bios_dumper in intel-gpu-tools seems interesting. - </p> - <p> - <b>Use 'drm.debug=0x06' kernel parameter when booting in grub!</b> - </p> - <p> - Before each test run, boot a live USB and delete the old logs in /var/log (kernel log, xorg log, dmesg and so on). - </p> - <p> - Load (from the ROM) the runningvga.bin for each LCD panel on each machine; do not execute it, only load it! (coreboot will have to be modified). - Rename the ROM appropriately, based on the machine name and the panel name. coreboot_nativegfx_5868_plusrunningvga_t60_14_LTD141ECMB.rom, - for instance. Keep a copy for later use. - </p> + <p> + Now dump a copy of the running VGA BIOS: + <b>$ sudo dd if=/dev/mem bs=64k of=runningvga.bin skip=12 count=1</b><br/> + Then do (and record the output):<br/> + <b>$ ./intelvbttool runningvga.bin > intelvbttool_out</b> + </p> - <p>You are supposed to:</p> - <ul> - <li>enable native graphics in menuconfig</li> - <li>include the self-modified VGA ROM (load, but not execute) - for reverse engineering the correct VBT tables.</li> - </ul> + <p> + Backup both files (runningvga.bin and intelvbttool_out), renaming them to match the machine and LCD panel used. + <a href="../misc/index.html#get_edid_panelname">../misc/index.html#get_edid_panelname</a> will show you how to get the name (model) of the LCD panel used. + </p> - <p> - With each boot, make notes about what you see and get logs using the <a href="#standard_test">standard test</a>. - You will need the files from <a href="#intelvbttool_results">#intelvbttool_results</a> for each machine. - </p> + <h2>Test results (# means untested and all had docks, unless noted).</h2> - Results (# means untested): <ul> <li> <b>X60/X60s:</b> @@ -216,23 +350,23 @@ <li>TMD-Toshiba LTD121ECHB: #</li> <li>CMO N121X5-L06: #</li> <li>Samsung LTN121XJ-L07: #</li> - <li>BOE-Hydis HT121X01-101: #</li> + <li>BOE-Hydis HT121X01-101: #</li> </ul> </li> <li> - <b>X60T XGA:</b> + <b>X60T XGA (1024x768):</b> <ul> <li>BOE-Hydis HV121X03-100: #</li> </ul> </li> <li> - <b>X60T SXGA+:</b> + <b>X60T SXGA+ (1400x1050):</b> <ul> <li>BOE-Hydis HV121P01-100: #</li> </ul> </li> <li> - <b>T60 14" XGA:</b> + <b>T60 14" XGA (1024x768):</b> <ul> <li>Samsung LTN141XA-L01: #</li> <li>CMO N141XC: #</li> @@ -241,7 +375,7 @@ </ul> </li> <li> - <b>T60 14" SXGA+</b> + <b>T60 14" SXGA+ (1400x1050):</b> <ul> <li>TMD-Toshiba LTD141EN9B: #</li> <li>Samsung LTN141P4-L02: #</li> @@ -249,24 +383,23 @@ </ul> </li> <li> - <b>T60 15" XGA</b> + <b>T60 15" XGA (1024x768):</b> <ul> <li>Samsung LTN150XG-L08: #</li> <li>LG-Philips LP150X09: #</li> <li>13N7068 (IDtech): #</li> <li>13N7069 (CMO): #</li> - </ul> </li> <li> - <b>T60 15" SXGA+</b> + <b>T60 15" SXGA+ (1400x1050):</b> <ul> <li>LG-Philips LP150E05-A2K1: #</li> <li>BOE-Hydis HV150P01-100: #</li> </ul> </li> <li> - <b>T60 15" UXGA</b> + <b>T60 15" UXGA (1600x1200):</b> <ul> <li>BOE-Hydis HV150UX1-100: #</li> <li>IDTech N150U3-L01: #</li> @@ -274,7 +407,7 @@ </ul> </li> <li> - <b>T50 15" QXGA</b> + <b>T60 15" QXGA (2048x1536):</b> <ul> <li>IDtech IAQX10N: #</li> <li>IDtech IAQX10S: #</li> @@ -282,175 +415,69 @@ </li> </ul> - <p><a href="#pagetop">Back to top of page</a></p> - -<hr/> - - <h1 id="intelvbttool_results">intelvbttool test results (VGA ROM dumps)</h1> - <p> - The VBIOS on i945 (intel gpu) platforms is self-modifying; that is, - its contents change when you run it. intelvbttool takes a dump of - the currently running vbios, and parses it. - </p> - - <p> - The idea is that we can extract the VBT tables using this knowledge, on the X60, X60 Tablet and T60 (Intel GPU). - </p> - - <p> - Here is an example of how VBT was implemented on the ThinkPad X230: - <a href="http://review.coreboot.org/#/c/5396">http://review.coreboot.org/#/c/5396</a>. - </p> + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> + + <h1 id="fallback_patches">Fallback patches</h1> - <p> - You'll need to build a T60 ROM with SeaBIOS and the VGA ROM (for Intel GPU). An X60 ROM is also needed (same configuration, using the VGA ROM for X60). - </p> + <ul> + <li> + Todo: test gnutoo's fallback patches: <a href="http://www.coreboot.org/Fallback_mechanism">http://www.coreboot.org/Fallback_mechanism</a> + (some parts use systemd. adapt for upstart, which is what trisquel uses)<br/> + see <a href="gnutoo_fallback_patch">this IRC log</a> (warning, not cleaned up) + </li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> + + <div class="section"> - <p> - T60 has DVI on its dock, make sure that the dock is attached when getting this output. - </p> + <h1 id="other">Other - unlisted (low priority)</h1> + + <ul> + <li> + PTE errors still exist on i945 with 6718 (which is merged). <a href="http://review.coreboot.org/#/c/6718/">http://review.coreboot.org/#/c/6718/</a> + <ul> + <li><a href="future/dumps/pte_x60_6718/dmesg">dmesg</a></li> + <li><a href="future/dumps/pte_x60_6718/kern.log">kern.log</a></li> + <li>This doesn't seem to cause any issues for general use.</li> + </ul> + </li> + <li> + Implement INT 10H support in i945 native graphics. (this will be a lot of work. SeaBIOS has code for some geode boards, to get a general idea). + </li> + <li> + T60 15" QXGA (2048x1536): fixed issue where GRUB wouldn't show any graphics. (Not many people have this panel) + <ul> + <li>It might be the same issue I ran into with Paul on the X60 (not enough memory being allocated) since the same code works on T60 SXGA+ and UXGA, where GRUB actually display graphics.</li> + </ul> + </li> + </ul> + + <p><a href="#pagetop">Back to top of page.</a></p> + + </div> - <p> - Get intelvbttool here: <a href="http://review.coreboot.org/#/c/5842">http://review.coreboot.org/#/c/5842</a> (util/intelvbttool). - </p> + <div class="section"> <p> - Now dump a copy of the running VGA BIOS: - <b>$ sudo dd if=/dev/mem bs=64k of=runningvga.bin skip=12 count=1</b><br/> - Then do (and record the output):<br/> - <b>$ ./intelvbttool runningvga.bin > intelvbttool_out</b> + Copyright © 2014, 2015 Francis Rowe <info@gluglug.org.uk><br/> + This document is released under the Creative Commons Attribution-ShareAlike 4.0 International Public License and all future versions. + A copy of the license can be found at <a href="../license.txt">../license.txt</a>. </p> <p> - Backup both files (runningvga.bin and intelvbttool_out), renaming them to match the machine and LCD panel used. - <a href="../misc/index.html#get_edid_panelname">../misc/index.html#get_edid_panelname</a> will show you how to get the name (model) of the LCD panel used. + This document is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See <a href="../license.txt">../license.txt</a> for more information. </p> - - <h2>Test results (# means untested and all had docks, unless noted).</h2> - - <ul> - <li> - <b>X60/X60s:</b> - <ul> - <li>TMD-Toshiba LTD121ECHB: #</li> - <li>CMO N121X5-L06: #</li> - <li>Samsung LTN121XJ-L07: #</li> - <li>BOE-Hydis HT121X01-101: #</li> - </ul> - </li> - <li> - <b>X60T XGA (1024x768):</b> - <ul> - <li>BOE-Hydis HV121X03-100: #</li> - </ul> - </li> - <li> - <b>X60T SXGA+ (1400x1050):</b> - <ul> - <li>BOE-Hydis HV121P01-100: #</li> - </ul> - </li> - <li> - <b>T60 14" XGA (1024x768):</b> - <ul> - <li>Samsung LTN141XA-L01: #</li> - <li>CMO N141XC: #</li> - <li>BOE-Hydis HT14X14: #</li> - <li>TMD-Toshiba LTD141ECMB: #</li> - </ul> - </li> - <li> - <b>T60 14" SXGA+ (1400x1050):</b> - <ul> - <li>TMD-Toshiba LTD141EN9B: #</li> - <li>Samsung LTN141P4-L02: #</li> - <li>Boe-Hydis HT14P12: #</li> - </ul> - </li> - <li> - <b>T60 15" XGA (1024x768):</b> - <ul> - <li>Samsung LTN150XG-L08: #</li> - <li>LG-Philips LP150X09: #</li> - <li>13N7068 (IDtech): #</li> - <li>13N7069 (CMO): #</li> - </ul> - </li> - <li> - <b>T60 15" SXGA+ (1400x1050):</b> - <ul> - <li>LG-Philips LP150E05-A2K1: #</li> - <li>BOE-Hydis HV150P01-100: #</li> - </ul> - </li> - <li> - <b>T60 15" UXGA (1600x1200):</b> - <ul> - <li>BOE-Hydis HV150UX1-100: #</li> - <li>IDTech N150U3-L01: #</li> - <li>BOE-Hydis HV150UX1-102: #</li> - </ul> - </li> - <li> - <b>T60 15" QXGA (2048x1536):</b> - <ul> - <li>IDtech IAQX10N: #</li> - <li>IDtech IAQX10S: #</li> - </ul> - </li> - </ul> - - <p><a href="#pagetop">Back to top of page.</a></p> - -<hr/> - - <h1 id="fallback_patches">Fallback patches</h1> - - <ul> - <li> - Todo: test gnutoo's fallback patches: <a href="http://www.coreboot.org/Fallback_mechanism">http://www.coreboot.org/Fallback_mechanism</a> - (some parts use systemd. adapt for upstart, which is what trisquel uses)<br/> - see <a href="gnutoo_fallback_patch">this IRC log</a> (warning, not cleaned up) - </li> - </ul> -<hr/> - - <h1 id="other">Other - unlisted (low priority)</h1> - - <ul> - <li> - PTE errors still exist on i945 with 6718 (which is merged). <a href="http://review.coreboot.org/#/c/6718/">http://review.coreboot.org/#/c/6718/</a> - <ul> - <li><a href="future/dumps/pte_x60_6718/dmesg">dmesg</a></li> - <li><a href="future/dumps/pte_x60_6718/kern.log">kern.log</a></li> - <li>This doesn't seem to cause any issues for general use.</li> - </ul> - </li> - <li> - Implement INT 10H support in i945 native graphics. (this will be a lot of work. SeaBIOS has code for some geode boards, to get a general idea). - </li> - <li> - T60 15" QXGA (2048x1536): fixed issue where GRUB wouldn't show any graphics. (Not many people have this panel) - <ul> - <li>It might be the same issue I ran into with Paul on the X60 (not enough memory being allocated) since the same code works on T60 SXGA+ and UXGA, where GRUB actually display graphics.</li> - </ul> - </li> - </ul> - -<hr/> - - <p> - Copyright © 2014 Francis Rowe <info@gluglug.org.uk><br/> - This document is released under the Creative Commons Attribution-ShareAlike 4.0 International Public License and all future versions. - A copy of the license can be found at <a href="../license.txt">../license.txt</a>. - </p> - - <p> - This document is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See <a href="../license.txt">../license.txt</a> for more information. - </p> + </div> </body> </html> diff --git a/docs/future/old.html b/docs/future/old.html index eeaa96e..0f77a0a 100644 --- a/docs/future/old.html +++ b/docs/future/old.html @@ -16,256 +16,272 @@ <body> - <header> - <h1 id="pagetop">Development notes (old/obsolete notes)</h1> - <aside>For current notes, see <a href="index.html">index.html</a>.</aside> - </header> - - <p> - These are old (obsolete) notes that mare kept because they might become useful again in the future. - </p> - -<hr/> - - <h2>Contents</h2> - <ul> - <li><a href="#x60_native_notes">X60 native graphics initialization (backlight controls)</a></li> - <li><a href="#t60_native_notes">T60 native graphics initialization (backlight controls)</a></li> - <li><a href="#5320_kernel312fix">i945: 3D fix (based on 5927) for kernel 3.12+ on 5320</a></li> - <li><a href="#x60_cb5927_testing">i945/x60: coreboot 5927 testing (3D fix for kernel 3.12+ on replay code)</a></li> - </ul> + <div class="section"> -<hr/> + <h1 id="pagetop">Development notes (old/obsolete notes)</h1> + <p> + For current notes, see <a href="index.html">index.html</a>. + </p> - <h1 id="x60_native_notes">X60 native graphics initialization (with backlight controls)</h1> + <p> + These are old (obsolete) notes that mare kept because they might become useful again in the future. + </p> + + </div> - <p> - <b> - This is now obsolete. A better way was found (included in libreboot): <a href="http://review.coreboot.org/#/c/6731/">http://review.coreboot.org/#/c/6731/</a> - </b> - </p> + <div class="section"> + + <h1>Table of contents</h1> + <ul> + <li><a href="#x60_native_notes">X60 native graphics initialization (backlight controls)</a></li> + <li><a href="#t60_native_notes">T60 native graphics initialization (backlight controls)</a></li> + <li><a href="#5320_kernel312fix">i945: 3D fix (based on 5927) for kernel 3.12+ on 5320</a></li> + <li><a href="#x60_cb5927_testing">i945/x60: coreboot 5927 testing (3D fix for kernel 3.12+ on replay code)</a></li> + </ul> + + </div> + + <div class="section"> + + <h1 id="x60_native_notes">X60 native graphics initialization (with backlight controls)</h1> - <p> - <b><i>Also check <a href="#5320_kernel312fix">#5320_kernel312fix</a> (to fix 3D on kernel 3.12/higher)</i></b> - </p> - <p> - <b>The fix below was done on 5320/6 (from review.coreboot.org) but should work just fine on later versions of 5320.</b> - </p> - <p> - Native gpu init + backlight controls! (Fn keys). Also confirmed on X60 Tablet (1024x768) and X60 Tablet (1400x1050) - </p> - <p> - <b>Add backlight controls:</b> in <i>src/mainboard/lenovo/x60/devicetree.cb</i>, change <b>gpu_backlight</b> to <b>0x879F879E</b> - </p> - <p> - That's all! <b>This has also been backported into libreboot 5th release (line 1233 in src/mainboard/lenovo/x60/i915io.c)</b>. GNUtoo (Denis Carikli) - told me about the register <b>BLC_PWM_CTL</b> and that you could set it to control backlight. I read that address using devmem2 while running the VBIOS:<br/> - <b># devmem2 0xe4361254 w</b> - </p> - <p> - The change is also included in libreboot 6. - </p> - <p> - When doing this, it gave back that value. The same trick was used to get backlight controls for T60 (see <a href="#t60_native_notes">#t60_native_notes</a>). - </p> + <p> + <b> + This is now obsolete. A better way was found (included in libreboot): <a href="http://review.coreboot.org/#/c/6731/">http://review.coreboot.org/#/c/6731/</a> + </b> + </p> - <h2>Further notes</h2> <p> - Reading <b>0xe4361254</b> (address) in Lenovo BIOS always yields FFFFFFFF, even when writing to it (and writing to it doesn't affect brightness controls). - 'mtjm' on IRC found that the buttons (Fn keys) control /sys/class/backlight/acpi_video0 which has no affect on 61254 (BLC_PWM_CTL). He says - intel_backlight has different values and uses the register. devmem2 works, needs checking <b>lspci -vv</b> for where the memory is mapped, - which is different than on coreboot; mtjm found that it was 0xec061254 on his machine (X60 Tablet), and the register value is different too. - <b>This is relevant, because we still don't know how backlight controls are actually handled. We got it working by accident. We need to know more.</b>. + <b><i>Also check <a href="#5320_kernel312fix">#5320_kernel312fix</a> (to fix 3D on kernel 3.12/higher)</i></b> </p> <p> - Intel-gpu-tools may prove useful for further debugging: <a href="http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/">http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/</a> + <b>The fix below was done on 5320/6 (from review.coreboot.org) but should work just fine on later versions of 5320.</b> </p> <p> - mtjm says 0xe4300000 is an MMIO region of the gpu (lspci -vv shows it), 0x61254 (BLC_PWM_CTL) is a documented register. Searching the kernel driver for backlight - shows that in intel_panel.c this register is used (there is an XXX comment about finding the right value, where recent kernels get it from. + Native gpu init + backlight controls! (Fn keys). Also confirmed on X60 Tablet (1024x768) and X60 Tablet (1400x1050) </p> <p> - What we want to do is calculate a good value, instead of setting it in devicetree.cb. mtjm says about backlight physics: - it has a light source , uses pulse width modulation (PWM) to turn it on/off, dimming is done by spending less time on. - <b>Note: this may not be correct; he says his understanding is based on how the Lenote yeeloong works</b>. + <b>Add backlight controls:</b> in <i>src/mainboard/lenovo/x60/devicetree.cb</i>, change <b>gpu_backlight</b> to <b>0x879F879E</b> </p> <p> - mtjm goes on to say, that the register specifies the frequency used for PWM in its depending on the GPU core frequency, so it - might be possible to calculate it without hardcoded laptop-specific values. Therefore, I am supposed to find out the 'display core frequency' - (mtjm says there might be a register for it; also, it might be in 5320 or the replay code) and the PWM modulation frequency. - https://en.wikipedia.org/wiki/Backlight#Flicker_due_to_backlight_dimming + That's all! <b>This has also been backported into libreboot 5th release (line 1233 in src/mainboard/lenovo/x60/i915io.c)</b>. GNUtoo (Denis Carikli) + told me about the register <b>BLC_PWM_CTL</b> and that you could set it to control backlight. I read that address using devmem2 while running the VBIOS:<br/> + <b># devmem2 0xe4361254 w</b> </p> <p> - phcoder (Vladimir Serbinenko) who is author of 5320 (review.coreboot.org) talks about 'duty cycle limit' and 'flickering frequency'. + The change is also included in libreboot 6. + </p> + <p> + When doing this, it gave back that value. The same trick was used to get backlight controls for T60 (see <a href="#t60_native_notes">#t60_native_notes</a>). </p> - <p><a href="#pagetop">Back to top of page</a></p> - -<hr/> + <h2>Further notes</h2> + <p> + Reading <b>0xe4361254</b> (address) in Lenovo BIOS always yields FFFFFFFF, even when writing to it (and writing to it doesn't affect brightness controls). + 'mtjm' on IRC found that the buttons (Fn keys) control /sys/class/backlight/acpi_video0 which has no affect on 61254 (BLC_PWM_CTL). He says + intel_backlight has different values and uses the register. devmem2 works, needs checking <b>lspci -vv</b> for where the memory is mapped, + which is different than on coreboot; mtjm found that it was 0xec061254 on his machine (X60 Tablet), and the register value is different too. + <b>This is relevant, because we still don't know how backlight controls are actually handled. We got it working by accident. We need to know more.</b>. + </p> + <p> + Intel-gpu-tools may prove useful for further debugging: <a href="http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/">http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/</a> + </p> + <p> + mtjm says 0xe4300000 is an MMIO region of the gpu (lspci -vv shows it), 0x61254 (BLC_PWM_CTL) is a documented register. Searching the kernel driver for backlight + shows that in intel_panel.c this register is used (there is an XXX comment about finding the right value, where recent kernels get it from. + </p> + <p> + What we want to do is calculate a good value, instead of setting it in devicetree.cb. mtjm says about backlight physics: + it has a light source , uses pulse width modulation (PWM) to turn it on/off, dimming is done by spending less time on. + <b>Note: this may not be correct; he says his understanding is based on how the Lenote yeeloong works</b>. + </p> + <p> + mtjm goes on to say, that the register specifies the frequency used for PWM in its depending on the GPU core frequency, so it + might be possible to calculate it without hardcoded laptop-specific values. Therefore, I am supposed to find out the 'display core frequency' + (mtjm says there might be a register for it; also, it might be in 5320 or the replay code) and the PWM modulation frequency. + https://en.wikipedia.org/wiki/Backlight#Flicker_due_to_backlight_dimming + </p> + <p> + phcoder (Vladimir Serbinenko) who is author of 5320 (review.coreboot.org) talks about 'duty cycle limit' and 'flickering frequency'. + </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="t60_native_notes">T60 native graphics initialization (with backlight controls)</h1> - <h1 id="t60_native_notes">T60 native graphics initialization (with backlight controls)</h1> + <p> + <b> + This is now obsolete. A better way was found (included in libreboot): <a href="http://review.coreboot.org/#/c/6731/">http://review.coreboot.org/#/c/6731/</a> + </b> + </p> + <p> + <b><i>Also check <a href="#5320_kernel312fix">#5320_kernel312fix</a> (to fix 3D on kernel 3.12/higher)</i></b> + </p> + <p> + <b>The fix below was done on an earlier version of 5345 changeset (review.coreboot.org), but should work on the current version. it is included in libreboot 6</b> + </p> + <p> + <b>Add backlight controls:</b> in <i>src/mainboard/lenovo/t60/devicetree.cb</i>, change <b>gpu_backlight</b> to <b>0x58BF58BE</b> + </p> + <p> + Hold on! Check <a href="../misc/index.html#get_edid_panelname">../misc/index.html#get_edid_panelname</a> to know what LCD panel you have. This is important for the next step! + </p> - <p> - <b> - This is now obsolete. A better way was found (included in libreboot): <a href="http://review.coreboot.org/#/c/6731/">http://review.coreboot.org/#/c/6731/</a> - </b> - </p> - <p> - <b><i>Also check <a href="#5320_kernel312fix">#5320_kernel312fix</a> (to fix 3D on kernel 3.12/higher)</i></b> - </p> - <p> - <b>The fix below was done on an earlier version of 5345 changeset (review.coreboot.org), but should work on the current version. it is included in libreboot 6</b> - </p> - <p> - <b>Add backlight controls:</b> in <i>src/mainboard/lenovo/t60/devicetree.cb</i>, change <b>gpu_backlight</b> to <b>0x58BF58BE</b> - </p> - <p> - Hold on! Check <a href="../misc/index.html#get_edid_panelname">../misc/index.html#get_edid_panelname</a> to know what LCD panel you have. This is important for the next step! - </p> + <h2>Supported panels</h2> + <p> + <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a>. + </p> - <h2>Supported panels</h2> <p> - <a href="../hcl/index.html#supported_t60_list">../hcl/index.html#supported_t60_list</a>. + See <a href="index.html#lcd_i945_incompatibility">index.html#lcd_i945_incompatibility</a>. </p> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> - <p> - See <a href="index.html#lcd_i945_incompatibility">index.html#lcd_i945_incompatibility</a>. - </p> - - <p><a href="#pagetop">Back to top of page</a></p> - -<hr/> + <div class="section"> - <h1 id="5320_kernel312fix">i945: 3D fix (based on 5927) for kernel 3.12+ on 5320</h1> + <h1 id="5320_kernel312fix">i945: 3D fix (based on 5927) for kernel 3.12+ on 5320</h1> - <p> - <b> - This is now obsolete. Merged in coreboot: <a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a> - </b> - </p> + <p> + <b> + This is now obsolete. Merged in coreboot: <a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a> + </b> + </p> - <p><b>This needs to be rewritten (or better organized, or deleted?)</b>. This is also now included in libreboot 6 (using the proper way, not the 7c0000 method which was a hack)</p> + <p><b>This needs to be rewritten (or better organized, or deleted?)</b>. This is also now included in libreboot 6 (using the proper way, not the 7c0000 method which was a hack)</p> - <p> - <b>This was done on 5320/6 so far. The fix below is for 5320/6 which is now obsolete. This needs to be re-done for the latest version - of 5320. The fix below is (in practise) only for reference, therefore.</b> - </p> + <p> + <b>This was done on 5320/6 so far. The fix below is for 5320/6 which is now obsolete. This needs to be re-done for the latest version + of 5320. The fix below is (in practise) only for reference, therefore.</b> + </p> - <p> - See <a href="#x60_cb5927_testing">#x60_cb5927_testing</a> for the original (and current) fix, for the replay code. Now we want - to implement that on top of <a href="http://review.coreboot.org/#/c/5320">http://review.coreboot.org/#/c/5320</a> - which is the current code for native graphics initialization on i945. - </p> + <p> + See <a href="#x60_cb5927_testing">#x60_cb5927_testing</a> for the original (and current) fix, for the replay code. Now we want + to implement that on top of <a href="http://review.coreboot.org/#/c/5320">http://review.coreboot.org/#/c/5320</a> + which is the current code for native graphics initialization on i945. + </p> - <p> - src/northbridge/intel/i945/gma.c (using the 7c0000 hack) on 5320: <a href="dumps/5320_7c0000_gma.c">5320_7c0000_gma.c</a> (rename it to gma.c, - replacing the current one). - </p> + <p> + src/northbridge/intel/i945/gma.c (using the 7c0000 hack) on 5320: <a href="dumps/5320_7c0000_gma.c">5320_7c0000_gma.c</a> (rename it to gma.c, + replacing the current one). + </p> - <p> - The above is a hack (as is the original). A better (more correct) method is implemented in later versions of 5927, so - that should also be adapted for 5320. For now, you can use the above fix. - </p> + <p> + The above is a hack (as is the original). A better (more correct) method is implemented in later versions of 5927, so + that should also be adapted for 5320. For now, you can use the above fix. + </p> - <p> - The correct way to do it is to set gtt address to (end of stolen memory - gtt size), which is what later versions of 5927 do (successfully). - </p> + <p> + The correct way to do it is to set gtt address to (end of stolen memory - gtt size), which is what later versions of 5927 do (successfully). + </p> - <p> - Here is some debugging output using intel_gpu_tools v1.2-1 (from trisquel repositories) using tool "intel_gtt": - </p> + <p> + Here is some debugging output using intel_gpu_tools v1.2-1 (from trisquel repositories) using tool "intel_gtt": + </p> - <ul> - <li> - Trisquel 6. kernel 3.14.4: - <ul> - <li>with libreboot 5th release (using the 7c0000 gtt hack from 5927/3): <a href="http://paste.debian.net/104306">http://paste.debian.net/104306</a></li> - <li>with coreboot+vgarom: <a href="http://paste.debian.net/104309">http://paste.debian.net/104309</a></li> - </ul> - </li> - <li> - Trisquel 6. kernel 3.2.0-60 (from Trisquel repositories): - <ul> - <li>with coreboot (no vbios or native init): <a href="http://paste.debian.net/104341">http://paste.debian.net/104341</a></li> - </ul> - </li> - </ul> + <ul> + <li> + Trisquel 6. kernel 3.14.4: + <ul> + <li>with libreboot 5th release (using the 7c0000 gtt hack from 5927/3): <a href="http://paste.debian.net/104306">http://paste.debian.net/104306</a></li> + <li>with coreboot+vgarom: <a href="http://paste.debian.net/104309">http://paste.debian.net/104309</a></li> + </ul> + </li> + <li> + Trisquel 6. kernel 3.2.0-60 (from Trisquel repositories): + <ul> + <li>with coreboot (no vbios or native init): <a href="http://paste.debian.net/104341">http://paste.debian.net/104341</a></li> + </ul> + </li> + </ul> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + + <h1 id="x60_cb5927_testing">i945/X60: Coreboot 5927 testing (3D fix for kernel 3.12+ on replay code)</h1> - <p><a href="#pagetop">Back to top of page</a></p> + <p> + <b> + This is now obsolete. Merged in coreboot: <a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a> + </b> + </p> -<hr/> + <p><b>The latest version as-is (5927/11) has not been tested by me yet. Always boot with 'drm.debug=0x06' kernel parameter when testing this.</b></p> - <h1 id="x60_cb5927_testing">i945/X60: Coreboot 5927 testing (3D fix for kernel 3.12+ on replay code)</h1> + <p> + This is the fix for 3D on kernel 3.12 and higher on i945 (ThinkPad X60 in this case). This is for the replay code. + Libreboot 5th release has a version of this backported already (based on 5927/3 using the '7c0000' hack). + </p> - <p> - <b> - This is now obsolete. Merged in coreboot: <a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a> - </b> - </p> + <p> + <b> + The replay code is obsolete (see 5320 changeset on review.coreboot.org for better version + which supports more machines/screens, and then 5345 for T60). Information here for reference since that is where the fix was first applied. + </b> + </p> - <p><b>The latest version as-is (5927/11) has not been tested by me yet. Always boot with 'drm.debug=0x06' kernel parameter when testing this.</b></p> + <p> + Read the information on <a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a>. + </p> - <p> - This is the fix for 3D on kernel 3.12 and higher on i945 (ThinkPad X60 in this case). This is for the replay code. - Libreboot 5th release has a version of this backported already (based on 5927/3 using the '7c0000' hack). - </p> + <p> + For historical purposes, here is a collection of IRC logs that once existed on this page, related to the issue: + <a href="dumps/kernel312_irc">kernel312_irc</a>. + </p> - <p> - <b> - The replay code is obsolete (see 5320 changeset on review.coreboot.org for better version - which supports more machines/screens, and then 5345 for T60). Information here for reference since that is where the fix was first applied. - </b> - </p> + <p> + PGETBL_CTL differs between VBIOS (-) and native graphics init (+).<br/> - <p> - Read the information on <a href="http://review.coreboot.org/#/c/5927/">http://review.coreboot.org/#/c/5927/</a>. - </p> + - PGETBL_CTL: 0x3ffc0001<br/> + + PGETBL_CTL: 0x3f800001 + </p> + <p>GTT (graphics translation table) size is PGETBL_save, max 256 KiB. BSM (Base of Stolen Memory) is given by the bios.</p> + + <ul> + <li>5927/7: <a href="dumps/5927_7.tar.gz">5927_7.tar.gz</a> (GRUB graphics are correct now, and 3D still works)</li> + <li>5927/6: <a href="dumps/5927_6.tar.gz">5927_6.tar.gz</a> (GRUB graphics still corrupt, 3D/everything still works after GRUB)</li> + <li>5927/5: <a href="dumps/5927_5.tar.gz">5927_5.tar.gz</a> (GRUB graphics corrupt, 3D/everything still works after GRUB)</li> + <li>5927/3: <a href="dumps/5927_3.tar.gz">5927_3.tar.gz</a> (3D still works! kernel 3.14.4) - the '7c0000' hack</li> + <li>5927/2: <a href="dumps/5927_2.tar.gz">5927_2.tar.gz</a> (3D works! kernel 3.14.4) - the '7c0000' hack</li> + <li> + 5927/1 (didn't fix the 3D issue): + <ul> + <li><a href="dumps/5927_cbmemc">cbmem -c</a></li> + <li><a href="dumps/5927_crashdump">/sys/class/drm/card0/error</a></li> + <li><a href="dumps/5927_config">.config</a></li> + </ul> + </li> + </ul> + + <p><a href="#pagetop">Back to top of page</a></p> + + </div> + + <div class="section"> + <p> - For historical purposes, here is a collection of IRC logs that once existed on this page, related to the issue: - <a href="dumps/kernel312_irc">kernel312_irc</a>. + Copyright © 2014, 2015 Francis Rowe <info@gluglug.org.uk><br/> + This document is released under the Creative Commons Attribution-ShareAlike 4.0 International Public License and all future versions. + A copy of the license can be found at <a href="../license.txt">../license.txt</a>. </p> <p> - PGETBL_CTL differs between VBIOS (-) and native graphics init (+).<br/> - - - PGETBL_CTL: 0x3ffc0001<br/> - + PGETBL_CTL: 0x3f800001 + This document is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See <a href="../license.txt">../license.txt</a> for more information. </p> - - <p>GTT (graphics translation table) size is PGETBL_save, max 256 KiB. BSM (Base of Stolen Memory) is given by the bios.</p> - - <ul> - <li>5927/7: <a href="dumps/5927_7.tar.gz">5927_7.tar.gz</a> (GRUB graphics are correct now, and 3D still works)</li> - <li>5927/6: <a href="dumps/5927_6.tar.gz">5927_6.tar.gz</a> (GRUB graphics still corrupt, 3D/everything still works after GRUB)</li> - <li>5927/5: <a href="dumps/5927_5.tar.gz">5927_5.tar.gz</a> (GRUB graphics corrupt, 3D/everything still works after GRUB)</li> - <li>5927/3: <a href="dumps/5927_3.tar.gz">5927_3.tar.gz</a> (3D still works! kernel 3.14.4) - the '7c0000' hack</li> - <li>5927/2: <a href="dumps/5927_2.tar.gz">5927_2.tar.gz</a> (3D works! kernel 3.14.4) - the '7c0000' hack</li> - <li> - 5927/1 (didn't fix the 3D issue): - <ul> - <li><a href="dumps/5927_cbmemc">cbmem -c</a></li> - <li><a href="dumps/5927_crashdump">/sys/class/drm/card0/error</a></li> - <li><a href="dumps/5927_config">.config</a></li> - </ul> - </li> - </ul> - - <p><a href="#pagetop">Back to top of page</a></p> - -<hr/> - - <p> - Copyright © 2014 Francis Rowe <info@gluglug.org.uk><br/> - This document is released under the Creative Commons Attribution-ShareAlike 4.0 International Public License and all future versions. - A copy of the license can be found at <a href="../license.txt">../license.txt</a>. - </p> - - <p> - This document is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See <a href="../license.txt">../license.txt</a> for more information. - </p> + + </div> </body> </html> |