From f57a1d73109b7089156968e0b5b05944a1bf4c6e Mon Sep 17 00:00:00 2001
From: Francis Rowe <info@gluglug.org.uk>
Date: Fri, 31 Jul 2015 03:57:09 -0400
Subject: typo

---
(limited to 'site/faq')

diff --git a/site/faq/index.php b/site/faq/index.php
index 49049ab..48fe580 100644
--- a/site/faq/index.php
+++ b/site/faq/index.php
@@ -157,10 +157,9 @@
 				<h3 id="fsp">Firmware Support Package (FSP) <span class="ref">(<a href="#fsp">#fsp</a>)</span></h3>
 					<p>
 						On all recent Intel systems, coreboot support has revolved around integrating a blob (for each system) called
-						the <i>FSP</i> (firmware support package), which handles most of the hardware initialization, including
-						memory initialization. At present, it is believed that this can be replaced, but it will require a lot
-						of work on reverse engineering which will likely take many years, even for the most skilled developer working full-time.
-						Intel distributes the FSP blob to firmware developers (including coreboot).
+						the <i>FSP</i> (firmware support package), which handles all of the hardware initialization, including
+						memory initialization. Reverse engineering and replacing this blob is almost impossible, due to how complex it is. Even for the most skilled developer,
+						it would take years to replace. Intel distributes this blob to firmware developers, without source.
 					</p>
 				<h3 id="intelbastards">Intel is uncooperative <span class="ref">(<a href="#intelbastards">#intelbastards</a>)</span></h3>
 					<p>
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