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From 9f347bbef949f4a9f402e0ecfac91f7c58bafd84 Mon Sep 17 00:00:00 2001
From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
Date: Mon, 7 Sep 2015 22:26:55 -0500
Subject: [PATCH 140/146] cpu/amd/model_10xxx: Fix link type detection and XCS
buffer count setup
---
src/cpu/amd/model_10xxx/fidvid.c | 2 +-
src/cpu/amd/model_10xxx/init_cpus.c | 33 +++++++++++++++++++--------------
2 files changed, 20 insertions(+), 15 deletions(-)
diff --git a/src/cpu/amd/model_10xxx/fidvid.c b/src/cpu/amd/model_10xxx/fidvid.c
index 1d55275..110a299 100644
--- a/src/cpu/amd/model_10xxx/fidvid.c
+++ b/src/cpu/amd/model_10xxx/fidvid.c
@@ -379,7 +379,7 @@ static u32 nb_clk_did(int node, uint64_t cpuRev, uint8_t procPkg) {
u8 link0isGen3 = 0;
u8 offset;
if (AMD_CpuFindCapability(node, 0, &offset)) {
- link0isGen3 = (AMD_checkLinkType(node, 0, offset) & HTPHY_LINKTYPE_HT3 );
+ link0isGen3 = (AMD_checkLinkType(node, offset) & HTPHY_LINKTYPE_HT3 );
}
/* FIXME: NB_CLKDID should be 101b for AMD_DA_C2 in package
S1g3 in link Gen3 mode, but I don't know how to tell
diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c
index f17a439..0604ef8 100644
--- a/src/cpu/amd/model_10xxx/init_cpus.c
+++ b/src/cpu/amd/model_10xxx/init_cpus.c
@@ -845,7 +845,7 @@ static BOOL AMD_CpuFindCapability(u8 node, u8 cap_count, u8 * offset)
*
* Returns the link characteristic mask.
*/
-static u32 AMD_checkLinkType(u8 node, u8 link, u8 regoff)
+static u32 AMD_checkLinkType(u8 node, u8 regoff)
{
uint32_t val;
uint32_t val2;
@@ -876,7 +876,7 @@ static u32 AMD_checkLinkType(u8 node, u8 link, u8 regoff)
linktype |= HTPHY_LINKTYPE_HT1;
/* Check ganged */
- val = pci_read_config32(NODE_PCI(node, 0), (link << 2) + 0x170);
+ val = pci_read_config32(NODE_PCI(node, 0), (((regoff - 0x80) / 0x20) << 2) + 0x170);
if (val & 1)
linktype |= HTPHY_LINKTYPE_GANGED;
@@ -1116,7 +1116,7 @@ static void cpuSetAMDPCI(u8 node)
*/
for (j = 0; j < 4; j++) {
if (AMD_CpuFindCapability(node, j, &offset)) {
- if (AMD_checkLinkType(node, j, offset)
+ if (AMD_checkLinkType(node, offset)
& fam10_htphy_default[i].linktype) {
AMD_SetHtPhyRegister(node, j,
i);
@@ -1214,6 +1214,7 @@ static void cpuSetAMDPCI(u8 node)
pci_write_config32(NODE_PCI(node, 3), 0x1a0, dword);
uint8_t link;
+ uint8_t link_real;
uint8_t ganged;
uint8_t iolink;
uint8_t probe_filter_enabled = !!dual_node;
@@ -1235,8 +1236,9 @@ static void cpuSetAMDPCI(u8 node)
for (link = 0; link < 4; link++) {
if (AMD_CpuFindCapability(node, link, &offset)) {
- ganged = !!(pci_read_config32(NODE_PCI(node, 0), (link << 2) + 0x170) & 0x1);
- iolink = !!(AMD_checkLinkType(node, link, offset) & HTPHY_LINKTYPE_NONCOHERENT);
+ link_real = (offset - 0x80) / 0x20;
+ ganged = !!(pci_read_config32(NODE_PCI(node, 0), (link_real << 2) + 0x170) & 0x1);
+ iolink = !!(AMD_checkLinkType(node, offset) & HTPHY_LINKTYPE_NONCOHERENT);
if (!iolink && ganged) {
if (probe_filter_enabled) {
@@ -1332,7 +1334,7 @@ static void cpuSetAMDPCI(u8 node)
np_req_cmd = 12;
}
- dword = pci_read_config32(NODE_PCI(node, 0), (link * 0x20) + 0x94);
+ dword = pci_read_config32(NODE_PCI(node, 0), (link_real * 0x20) + 0x94);
dword &= ~(0x3 << 27); /* IsocRspData = isoc_rsp_data */
dword |= ((isoc_rsp_data & 0x3) << 27);
dword &= ~(0x3 << 25); /* IsocNpReqData = isoc_np_req_data */
@@ -1343,9 +1345,9 @@ static void cpuSetAMDPCI(u8 node)
dword |= ((isoc_preq & 0x7) << 19);
dword &= ~(0x7 << 16); /* IsocNpReqCmd = isoc_np_req_cmd */
dword |= ((isoc_np_req_cmd & 0x7) << 16);
- pci_write_config32(NODE_PCI(node, 0), (link * 0x20) + 0x94, dword);
+ pci_write_config32(NODE_PCI(node, 0), (link_real * 0x20) + 0x94, dword);
- dword = pci_read_config32(NODE_PCI(node, 0), (link * 0x20) + 0x90);
+ dword = pci_read_config32(NODE_PCI(node, 0), (link_real * 0x20) + 0x90);
dword &= ~(0x1 << 31); /* LockBc = 0x1 */
dword |= ((0x1 & 0x1) << 31);
dword &= ~(0x7 << 25); /* FreeData = free_data */
@@ -1364,7 +1366,7 @@ static void cpuSetAMDPCI(u8 node)
dword |= ((preq & 0x7) << 5);
dword &= ~(0x1f << 0); /* NpReqCmd = np_req_cmd */
dword |= ((np_req_cmd & 0x1f) << 0);
- pci_write_config32(NODE_PCI(node, 0), (link * 0x20) + 0x90, dword);
+ pci_write_config32(NODE_PCI(node, 0), (link_real * 0x20) + 0x90, dword);
}
}
@@ -1387,8 +1389,9 @@ static void cpuSetAMDPCI(u8 node)
for (link = 0; link < 4; link++) {
if (AMD_CpuFindCapability(node, link, &offset)) {
- ganged = !!(pci_read_config32(NODE_PCI(node, 0), (link << 2) + 0x170) & 0x1);
- iolink = !!(AMD_checkLinkType(node, link, offset) & HTPHY_LINKTYPE_NONCOHERENT);
+ link_real = (offset - 0x80) / 0x20;
+ ganged = !!(pci_read_config32(NODE_PCI(node, 0), (link_real << 2) + 0x170) & 0x1);
+ iolink = !!(AMD_checkLinkType(node, offset) & HTPHY_LINKTYPE_NONCOHERENT);
/* Set defaults */
isoc_rsp_tok_1 = 0;
@@ -1616,7 +1619,7 @@ static void cpuSetAMDPCI(u8 node)
}
}
- dword = pci_read_config32(NODE_PCI(node, 3), (link << 2) + 0x148);
+ dword = pci_read_config32(NODE_PCI(node, 3), (link_real << 2) + 0x148);
dword &= ~(0x3 << 30); /* FreeTok[3:2] = free_tokens[3:2] */
dword |= (((free_tokens >> 2) & 0x3) << 30);
dword &= ~(0x1 << 28); /* IsocRspTok1 = isoc_rsp_tok_1 */
@@ -1649,7 +1652,7 @@ static void cpuSetAMDPCI(u8 node)
dword |= (((preq_tok_0) & 0x3) << 2);
dword &= ~(0x3 << 0); /* ReqTok0 = req_tok_0 */
dword |= (((req_tok_0) & 0x3) << 0);
- pci_write_config32(NODE_PCI(node, 3), (link << 2) + 0x148, dword);
+ pci_write_config32(NODE_PCI(node, 3), (link_real << 2) + 0x148, dword);
}
}
@@ -1695,6 +1698,7 @@ static void cpuSetAMDPCI(u8 node)
}
uint8_t link;
+ uint8_t link_real;
uint8_t isochronous;
uint8_t isochronous_link_present;
@@ -1702,7 +1706,8 @@ static void cpuSetAMDPCI(u8 node)
isochronous_link_present = 0;
for (link = 0; link < 4; link++) {
if (AMD_CpuFindCapability(node, link, &offset)) {
- isochronous = (pci_read_config32(NODE_PCI(node, 0), (link * 0x20) + 0x84) >> 12) & 0x1;
+ link_real = (offset - 0x80) / 0x20;
+ isochronous = (pci_read_config32(NODE_PCI(node, 0), (link_real * 0x20) + 0x84) >> 12) & 0x1;
if (isochronous)
isochronous_link_present = 1;
--
1.7.9.5
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