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From 29c6cf2af61d3e131fc1c8bbcebe9335bcd2e776 Mon Sep 17 00:00:00 2001
From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
Date: Fri, 7 Aug 2015 23:58:28 -0500
Subject: [PATCH 101/146] cpu/amd/model_10xxx: Configure NB register 2
---
src/cpu/amd/model_10xxx/defaults.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h
index 4868c5c..5ab4335 100644
--- a/src/cpu/amd/model_10xxx/defaults.h
+++ b/src/cpu/amd/model_10xxx/defaults.h
@@ -621,6 +621,14 @@ static const struct {
[5] DisPciCfgCpuMstAbtRsp = 1,
[1] SyncFloodOnUsPwDataErr = 1 */
+ /* NB Configuration 2 */
+ { 3, 0x188, AMD_DR_GT_B0, AMD_PTYPE_ALL,
+ 0x00000010, 0x00000010 }, /* EnStpGntOnFlushMaskWakeup = 0x1 */
+
+ /* NB Configuration 2 */
+ { 3, 0x188, AMD_FAM15_ALL, AMD_PTYPE_ALL,
+ 0x00000200, 0x00000200 }, /* DisL3HiPriFreeListAlloc = 0x1 */
+
/* errata 346 - Fam10 C2, C3
* System software should set F3x188[22] to 1b. */
{ 3, 0x188, AMD_DR_Cx, AMD_PTYPE_ALL,
--
1.7.9.5
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