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From c15c778ced025a5a778e4c1d7ad03a40529f4d41 Mon Sep 17 00:00:00 2001
From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
Date: Sat, 5 Sep 2015 19:23:49 -0500
Subject: [PATCH 032/146] src/console: Add x86 printk spinlock support
---
src/Kconfig | 4 ++++
src/arch/x86/include/arch/smp/spinlock.h | 1 +
src/console/printk.c | 6 +++---
src/cpu/amd/car/post_cache_as_ram.c | 22 +++++++++++++++-------
4 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index bab05f2..2e6b5bc 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -447,6 +447,10 @@ config HAVE_HARD_RESET
This variable specifies whether a given board has a hard_reset
function, no matter if it's provided by board code or chipset code.
+config HAVE_ROMSTAGE_CONSOLE_SPINLOCK
+ bool
+ default n
+
config HAVE_MONOTONIC_TIMER
def_bool n
help
diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h
index a5904c7..5000779 100644
--- a/src/arch/x86/include/arch/smp/spinlock.h
+++ b/src/arch/x86/include/arch/smp/spinlock.h
@@ -13,6 +13,7 @@ typedef struct {
#ifdef __PRE_RAM__
spinlock_t* romstage_console_lock(void);
+void initialize_romstage_console_lock(void);
#endif
#define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 }
diff --git a/src/console/printk.c b/src/console/printk.c
index 2aae980..5a23db0 100644
--- a/src/console/printk.c
+++ b/src/console/printk.c
@@ -14,7 +14,7 @@
#include <stddef.h>
#include <trace.h>
-#if defined(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
+#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
#ifndef __PRE_RAM__
DECLARE_SPIN_LOCK(console_lock)
#endif
@@ -47,7 +47,7 @@ int do_printk(int msg_level, const char *fmt, ...)
DISABLE_TRACE;
#ifdef __PRE_RAM__
-#ifdef CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK
+#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
spin_lock(romstage_console_lock());
#endif
#else
@@ -61,7 +61,7 @@ int do_printk(int msg_level, const char *fmt, ...)
console_tx_flush();
#ifdef __PRE_RAM__
-#ifdef CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK
+#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
spin_unlock(romstage_console_lock());
#endif
#else
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index e265de1..e7a41e5 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -84,6 +84,10 @@ static void prepare_ramstage_region(void *resume_backup_memory)
memset_((void*)0, 0, CONFIG_RAMTOP - backup_top);
}
+#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK)
+ initialize_romstage_console_lock();
+#endif
+
print_car_debug("Done\n");
}
@@ -92,18 +96,19 @@ static void prepare_ramstage_region(void *resume_backup_memory)
static void vErrata343(void)
{
#ifdef BU_CFG2_MSR
- msr_t msr;
- unsigned int uiMask = 0xFFFFFFF7;
-
- msr = rdmsr(BU_CFG2_MSR);
- msr.hi &= uiMask; // set bit 35 to 0
- wrmsr(BU_CFG2_MSR, msr);
+ msr_t msr;
+ unsigned int uiMask = 0xFFFFFFF7;
+
+ msr = rdmsr(BU_CFG2_MSR);
+ msr.hi &= uiMask; // IcDisSpecTlbWr (bit 35) = 0
+ wrmsr(BU_CFG2_MSR, msr);
#endif
}
void post_cache_as_ram(void)
{
void *resume_backup_memory = NULL;
+ uint32_t family = amd_fam1x_cpu_family();
struct romstage_handoff *handoff;
handoff = romstage_handoff_find_or_add();
@@ -120,7 +125,10 @@ void post_cache_as_ram(void)
prepare_romstage_ramstack(resume_backup_memory);
/* from here don't store more data in CAR */
- vErrata343();
+ if (family < 0x6f) {
+ /* Family 10h or earlier */
+ vErrata343();
+ }
size_t car_size = car_data_size();
void *migrated_car = (void *)(CONFIG_RAMTOP - car_size);
--
1.7.9.5
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