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From 654222e8ccc7bf3e7d222a16aaeb3d5e2846b0d9 Mon Sep 17 00:00:00 2001
From: Timothy Pearson <tpearson@raptorengineeringinc.com>
Date: Mon, 6 Apr 2015 03:41:28 -0500
Subject: [PATCH 05/22] mainboard/lenovo/x200: Use defines from southbridge for
GPIO config
Change-Id: I9f65922d0785e06a173221b3262e73b575087dfd
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
---
src/mainboard/lenovo/x200/romstage.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/mainboard/lenovo/x200/romstage.c b/src/mainboard/lenovo/x200/romstage.c
index f232642..5f50f32 100644
--- a/src/mainboard/lenovo/x200/romstage.c
+++ b/src/mainboard/lenovo/x200/romstage.c
@@ -40,21 +40,21 @@
static void default_southbridge_gpio_setup(void)
{
- outl(0x197e23fe, DEFAULT_GPIOBASE + 0x00);
- outl(0xe1a66dfe, DEFAULT_GPIOBASE + 0x04);
- outl(0xe3faef3f, DEFAULT_GPIOBASE + 0x0c);
+ outl(0x197e23fe, DEFAULT_GPIOBASE + GP_IO_USE_SEL);
+ outl(0xe1a66dfe, DEFAULT_GPIOBASE + GP_IO_SEL);
+ outl(0xe3faef3f, DEFAULT_GPIOBASE + GP_LVL);
/* Disable blink [31:0]. */
- outl(0x00000000, DEFAULT_GPIOBASE + 0x18);
+ outl(0x00000000, DEFAULT_GPIOBASE + GPO_BLINK);
/* Set input inversion [31:0]. */
- outl(0x00000102, DEFAULT_GPIOBASE + 0x2c);
+ outl(0x00000102, DEFAULT_GPIOBASE + GPI_INV);
/* Enable GPIOs [60:32]. */
- outl(0x030306f6, DEFAULT_GPIOBASE + 0x30);
+ outl(0x030306f6, DEFAULT_GPIOBASE + GP_IO_USE_SEL2);
/* Set input/output mode [60:32] (0 == out, 1 == in). */
- outl(0x1f55f9f1, DEFAULT_GPIOBASE + 0x34);
+ outl(0x1f55f9f1, DEFAULT_GPIOBASE + GP_IO_SEL2);
/* Set gpio levels [60:32]. */
- outl(0x1dffff53, DEFAULT_GPIOBASE + 0x38);
+ outl(0x1dffff53, DEFAULT_GPIOBASE + GP_LVL2);
}
static void early_lpc_setup(void)
--
1.9.1
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