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<!DOCTYPE html>
<html>
<head>
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	<style type="text/css">
		@import url('../css/main.css');
	</style>

	<title>ThinkPad X200: flashing tutorial (BeagleBone Black)</title>
</head>

<body>

	<div class="section">
		<h1 id="pagetop">Flashing the X200 with a BeagleBone Black</h1>
			<p>Initial flashing instructions for X200.</p>
			<p>
				This guide is for those who want libreboot on their ThinkPad X200
				while they still have the original Lenovo BIOS present. This guide
				can also be followed (adapted) if you brick your X200, to know how
				to recover.
			</p>

			<p><a href="index.html">Back to main index</a></p>
	</div>

	<div class="section">

		<h1 id="flashchips">Flash chips</h1>
			
			<p>
				The X200 will use an 8MiB or 64Mb SOIC-16 chip (rare models
				will use a 4MiB or 32Mb SOIC-8 chip), below the palm rest.
			</p>
			
			<p>
				The X200S and X200 Tablet will use a WSON-8 flash chip, on the
				bottom of the motherboard (this requires removal of the
				motherboard). <b>Not all X200S/X200T are supported;
				see <a href="../hcl/x200.html#x200s">../hcl/x200.html#x200s</a>.</b>
			</p>
		
			<p>
				<a href="#pagetop">Back to top of page.</a>
			</p>
			
	</div>
	
	<div class="section">
	
		<h1 id="macaddress">MAC address</h1>
		
			<p>
				On the X200/X200S/X200T, the MAC address for the onboard
				gigabit ethernet chipset is stored inside the flash chip,
				along with other configuration data.
			</p>
			<p>
				Keep a note of the MAC address before disassembly; this is
				very important, because you will need to insert this into
				the libreboot ROM image before flashing it.
				It will be written in one of these locations:
			</p>
			
			<p>
				<img src="images/x200/disassembly/0002.jpg" alt="" />
				<img src="images/x200/disassembly/0001.jpg" alt="" />
			</p>
	
	</div>
		
	<div class="section">

		<h1 id="clip">Initial BBB configuration</h1>
		
			<p>
				Refer to <a href="bbb_setup.html">bbb_setup.html</a> for how to
				set up the BBB for flashing.
			</p>

			<p>
				The following shows how to connect the clip to the BBB	(on the P9 header), for SOIC-16 (clip: Pomona 5252):
			</p>
<pre>
POMONA 5252 (correlate with the BBB guide)
===  front (display) on your X200 ====
 NC              -       - 21
 1               -       - 17
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 18              -       - 3.3V PSU RED
 22              -       - NC - this is pin 1 on the flash chip
===  back (palmrest) on your X200 ===
<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i>
Here is a photo of the SOIC-16 flash chip. Pins are labelled:<br/>
<img src="images/x200/x200_pomona.jpg" alt="" />			
</pre>
			<p>
				The following shows how to connect the clip to the BBB	(on the P9 header), for SOIC-8 (clip: Pomona 5250):
			</p>
<pre>
POMONA 5250 (correlate with the BBB guide)
===  left side of the X200 (where the VGA port is) ====
 18              -       - 1
 22              -       - NC
 NC              -       - 21
 3.3V PSU RED    -       - 17 - this is pin 1 on the flash chip. in front of it is the screen.
===  right side of the X200 (where the audio jacks are) ===
<i>This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.</i>
Here is a photo of the SOIC-8 flash chip. The pins are labelled:<br/>
<img title="Copyright 2015 Patrick &quot;P. J.&quot; McDermott &lt;pj@pehjota.net&gt;, CC BY-SA 3.0 or later" src="images/x200/soic8.jpg" alt="freenode IRC #libreboot 01:42 UK/London timezone February 8th 2015: pehjota: fchmmr: Here are two photos in the camera's configured resolution; resize them as you wish: http://www.pehjota.net/~pj/x200/soic-8/.  License: CC BY-SA 3.0 or later.  If you want other angles or anything, let me know." alt="" />

Look at the pads in that photo, on the left and right. Those are for SOIC-16. Would it be possible to remove the SOIC-8 and solder a SOIC-16
chip on those pins?
</pre>
			<p>
				<b>On the X200S the flash chip is underneath the board, in a WSON package. 
				The pinout is very much the same as a SOIC-8, except you need to solder (there are no clips available).<br/>
				The following image shows how this is done:</b><br/>
				<img src="images/x200/wson_soldered.jpg" title="Copyright 2014 Steve Shenton &lt;sgsit@libreboot.org&gt; under CC-BY-SA 4.0" alt="" />
				<br/>
				In this image, a pin header was soldered onto the WSON. Another solution might be to de-solder the WSON-8 chip and put a SOIC-8 there instead.
				Check the list of SOIC-8 flash chips at <a href="../hcl/gm45_remove_me.html#flashchips">../hcl/gm45_remove_me.html#flashchips</a> but
				do note that these are only 4MiB (32Mb) chips. The only X200 SPI chips with 8MiB capacity are SOIC-16. For 8MiB capacity in this case,
				the X201 SOIC-8 flash chip (Macronix 25L6445E) might work.
				Another possible solution: ground GPIO33 and boot up in non-descriptor mode. This might make software flashing possible, if
				it's possible to circumvent any flashing protections that might exist.
			</p>

			<h2>
				The procedure
			</h2>
				<p>
					This section is for the X200. This does not apply to the X200S or X200 Tablet
					(for those machines, you have to remove the motherboard completely, since
					the flash chip is on the other side of the board).
				</p>
				<p>
					Remove these screws:<br/>
					<img src="images/x200/disassembly/0003.jpg" alt="" />
				</p>
				<p>
					Push the keyboard forward, gently, then lift it off and 
					disconnect it from the board:<br/>
					<img src="images/x200/disassembly/0004.jpg" alt="" />
					<img src="images/x200/disassembly/0005.jpg" alt="" />
				</p>
				<p>
					Pull the palm rest off, lifting from the left and right side at the back of the
					palm rest:<br/>
					<img src="images/x200/disassembly/0006.jpg" alt="" />
				</p>
				<p>
					Lift back the tape that covers a part of the flash chip, and
					then connect the clip:<br/>
					<img src="images/x200/disassembly/0007.jpg" alt="" />
					<img src="images/x200/disassembly/0008.jpg" alt="" />
				</p>
				<p>
					On pin 2 of the BBB, where you have the ground (GND), connect the
					ground to your PSU:<br/>
					<img src="images/x200/disassembly/0009.jpg" alt="" />
					<img src="images/x200/disassembly/0010.jpg" alt="" />
				</p>
				<p>
					Connect the 3.3V supply from your PSU to the flash chip (via
					the clip):<br/>
					<img src="images/x200/disassembly/0011.jpg" alt="" />
					<img src="images/x200/disassembly/0012.jpg" alt="" />
				</p>
				<p>
					Of course, make sure that your PSU is also plugged in and
					turn on:<br/>
					<img src="images/x200/disassembly/0013.jpg" alt="" />
				</p>
				<p>
					This tutorial tells you to use an ATX PSU, for the 3.3V DC
					supply. The PSU used when taking these photos is actually
					not an ATX PSU, but a PSU that is designed specifically
					for providing 3.3V DC (an ATX PSU will also work):<br/>
					<img src="images/x200/disassembly/0014.jpg" alt="" />
				</p>
				<p>
					Now, you should be ready to install libreboot.
				</p>
				<p>
					Flashrom binaries for ARM (tested on a BBB) are distributed in libreboot_util. Alternatively,
					libreboot also distributes flashrom source code which can be built.
				</p>
				<p>
					Log in as root on your BBB, using the instructions in
					<a href="bbb_setup.html#bbb_access">bbb_setup.html#bbb_access</a>.
				</p>
				
				<p>
					Test that flashrom works:<br/>
					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512</b><br/>
					In this case, the output was:
				</p>
<pre>
flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Macronix flash chip &quot;MX25L6405(D)&quot; (8192 kB, SPI) on linux_spi.
Found Macronix flash chip &quot;MX25L6406E/MX25L6436E&quot; (8192 kB, SPI) on linux_spi.
Found Macronix flash chip &quot;MX25L6445E/MX25L6473E&quot; (8192 kB, SPI) on linux_spi.
Multiple flash chip definitions match the detected chip(s): &quot;MX25L6405(D)&quot;, &quot;MX25L6406E/MX25L6436E&quot;, &quot;MX25L6445E/MX25L6473E&quot;
Please specify which chip definition to use with the -c &lt;chipname&gt; option.
</pre>
				<p>
					How to backup factory.rom (change the -c option as neeed, for your flash chip):<br/>
					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory.rom</b><br/>
					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory1.rom</b><br/>
					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -r factory2.rom</b><br/>
					Note: the <b>-c</b> option is not required in libreboot's patched flashrom, because
					the redundant flash chip definitions in <i>flashchips.c</i> have been removed.<br/>
					Now compare the 3 images:<br/>
					# <b>sha512sum factory*.rom</b><br/>
					If the hashes match, then just copy one of them (the factory.rom) to a safe place (on a drive connected to another machine, not
					the BBB). This is useful for reverse engineering work, if there is a desirable behaviour in the original firmware
					that could be replicated in coreboot and libreboot.
				</p>
				<p>
					Follow the instructions at <a href="../hcl/gm45_remove_me.html#ich9gen">../hcl/gm45_remove_me.html#ich9gen</a>
					to change the MAC address inside the libreboot ROM image, before flashing it.
					Although there is a default MAC address inside the ROM image, this is not what you want. <b>Make sure
					to always change the MAC address to one that is correct for your system.</b>
				</p>
				<p>
					Now flash it:<br/>
					# <b>./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512 -w path/to/libreboot/rom/image.rom -V</b>
				</p>
				<p>
					<img src="images/x200/disassembly/0015.jpg" alt="" />
				</p>
				<p>
					You might see errors, but if it says <b>Verifying flash... VERIFIED</b> at the end, then it's flashed and should boot.
					If you see errors, try again (and again, and again); the message <b>Chip content is identical to the requested image</b>
					is also an indication of a successful installation.
				</p>
				<p>
					Example output from running the command (see above):
				</p>
<pre>
flashrom v0.9.7-r1854 on Linux 3.8.13-bone47 (armv7l)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
Found Macronix flash chip &quot;MX25L6405(D)&quot; (8192 kB, SPI) on linux_spi.
Reading old flash chip contents... done.
Erasing and writing flash chip... FAILED at 0x00001000! Expected=0xff, Found=0x00, failed byte count from 0x00000000-0x0000ffff: 0xd716
ERASE FAILED!
Reading current flash chip contents... done. Looking for another erase function.
Erase/write done.
Verifying flash... VERIFIED.
</pre>
				
			<p>
				<a href="#pagetop">Back to top of page.</a>
			</p>
			
	</div>

	<div class="section">

		<p>
			Copyright &copy; 2014, 2015 Francis Rowe &lt;info@gluglug.org.uk&gt;<br/>
			This document is released under the Creative Commons Attribution-ShareAlike 4.0 International Public License and all future versions.
			A copy of the license can be found at <a href="../license.txt">../license.txt</a>.
		</p>

		<p>
			This document is distributed in the hope that it will be useful,
			but WITHOUT ANY WARRANTY; without even the implied warranty of
			MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See <a href="../license.txt">../license.txt</a> for more information.
		</p>
		
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