How to programme an SPI flash chip with the BeagleBone Black

This document exists as a guide for reading from or writing to an SPI flash chip with the BeagleBone Black, using the flashrom software. BeagleBone Black rev. C was used when creating this guide, but earlier revisions may also work.

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Hardware requirements

Shopping list (pictures of this hardware is shown later):

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Setting up the 3.3V DC PSU

ATX PSU pinouts are on wikipedia

On 20-pin ATX PSUs, you can use pin 1 or 2 (orange) for 3.3V, and any of the ground/earth sources (black cables). Short PS_ON# / Power on (green) to a ground (black. there is one right next to it) using a wire/paperclip/jumper then power on the PSU.

On newer 24-pin ATX PSUs, there is an additional 3.3V (orange) on pin 12.

You only need one 3.3V supply and one ground for the flash chip, after grounding PS_ON# to ground. Multiple 3.3V supplies means that you could theoretically power multiple flash chips at once with the same PSU.

The male end of a 0.1" or 2.54mm header cable is not thick enough to remain permanently connected to the ATX PSU on its own. When connecting header cables to the connector on the ATX PSU, use a female end attached to a thicker piece of wire (you could use a paper clip), or wedge the male end of the jumper cable into the sides of the hole in the connector, instead of going through the centre.

Here is an example set up:

Accessing the operating system on the BBB

The operating system on your BBB will probably have an SSH daemon running where the root account has no password. Use SSH to access the operating system and set a root password. By default, the OS on your BBB will most likely use DHCP, so it should already have an IP address.

You will also be using the OS on your BBB for programming an SPI flash chip.

Alternatives to SSH (in case SSH fails)

You can also use a serial FTDI debug board with GNU Screen, to access the serial console.
# screen /dev/ttyUSB0 115200
Here are some example photos:

You can also connect the USB cable from the BBB to another computer and a new network interface will appear, with its own IP address. This is directly accessible from SSH, or screen:
# screen /dev/ttyACM0 115200

You can also access the uboot console, using the serial method instead of SSH.

Setting up spidev on the BBB

Log on as root on the BBB, using either SSH or a serial console as defined in #bbb_access. Make sure that you have internet access on your BBB.

Follow the instructions at http://elinux.org/BeagleBone_Black_Enable_SPIDEV#SPI0 up to (and excluding) the point where it tells you to modify uEnv.txt

You need to update the software on the BBB first. If you have an element14 brand BBB (sold by Premier Farnell plc. stores like Farnell element14, Newark element14, and Embest), you may need to work around a bug in the LED aging init script before you can update your software. If you don't have a file named /etc/init.d/led_aging.sh, you can skip this step and update your software as described below. Otherwise, replace the contents of this file with: 

#!/bin/sh -e
### BEGIN INIT INFO
# Provides:          led_aging.sh
# Required-Start:    $local_fs
# Required-Stop:     $local_fs
# Default-Start:     2 3 4 5
# Default-Stop:      0 1 6
# Short-Description: Start LED aging
# Description:       Starts LED aging (whatever that is)
### END INIT INFO

x=$(/bin/ps -ef | /bin/grep "[l]ed_acc")
if [ ! -n "$x" -a -x /usr/bin/led_acc ]; then
    /usr/bin/led_acc &
fi

Run apt-get update and apt-get upgrade then reboot the BBB, before continuing.

Check that the firmware exists:
# ls /lib/firmware/BB-SPI0-01-00A0.*
Output: 

/lib/firmware/BB-SPI0-01-00A0.dtbo

Then:
# echo BB-SPI0-01 > /sys/devices/bone_capemgr.*/slots
# cat /sys/devices/bone_capemgr.*/slots
Output: 

 0: 54:PF--- 
 1: 55:PF--- 
 2: 56:PF--- 
 3: 57:PF--- 
 4: ff:P-O-L Bone-LT-eMMC-2G,00A0,Texas Instrument,BB-BONE-EMMC-2G
 5: ff:P-O-L Bone-Black-HDMI,00A0,Texas Instrument,BB-BONELT-HDMI
 7: ff:P-O-L Override Board Name,00A0,Override Manuf,BB-SPI0-01

Verify that the spidev device now exists:
# ls -al /dev/spid*
Output: 

crw-rw---T 1 root spi 153, 0 Nov 19 21:07 /dev/spidev1.0

Now the BBB is ready to be used for flashing. Make this persist across reboots:
In /etc/default/capemgr add CAPE=BB-SPI0-01 at the end (or change the existing CAPE= entry to say that, if an entry already exists.

Get flashrom from the libreboot_util release archive, or build it from libreboot_src/git if you need to. An ARM binary (statically compiled) for flashrom exists in libreboot_util releases. Put the flashrom binary on your BBB.

You may also need ich9gen, if you will be flashing an ICH9-M laptop (such as the X200). Get it from libreboot_util, or build it from libreboot_src, and put the ARM binary for it on your BBB.

Finally, get the ROM image that you would like to flash and put that on your BBB.

Now test flashrom:
# ./flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=512
Output: 

Calibrating delay loop... OK.
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.

This means that it's working (the clip isn't connected to any flash chip, so the error is fine).

Connecting the Pomona 5250/5252

Use this image for reference when connecting the pomona to the BBB: http://beagleboard.org/Support/bone101#headers (D0 = MISO or connects to MISO).

The following shows how to connect clip to the BBB (on the P9 header), for SOIC-16 (clip: Pomona 5252): 

 NC              -       - 21
 1               -       - 17
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 NC              -       - NC
 18              -       - 3.3V PSU RED
 22              -       - NC - this is pin 1 on the flash chip
This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

The following shows how to connect clip to the BBB (on the P9 header), for SOIC-8 (clip: Pomona 5250): 

 18              -       - 1
 22              -       - NC
 NC              -       - 21
 3.3V PSU RED    -       - 17 - this is pin 1 on the flash chip
This is how you will connect. Numbers refer to pin numbers on the BBB, on the plugs near the DC jack.

NC = no connection

DO NOT connect 3.3V PSU RED yet. ONLY connect this once the pomona is connected to the flash chip.

You also need to connect the BLACK wire from the 3.3V PSU to pin 2 on the BBB (P9 header). It is safe to install this now (that is, before you connect the pomona to the flash chip).

if you need to extend the 3.3v psu leads, just use the same colour M-F leads, but keep all other leads short (10cm or less)

You should now have something that looks like this:

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Notes about stability

http://flashrom.org/ISP has some useful information about how to make flashing more reliable. Currently, we use spispeed=512 but it is possible to make some mods so that higher speeds can be used without any instability.

tty0_ in the coreboot IRC channel had this to say: 

<stefanct> http://flashrom.org/ISP
<stefanct> i was even using 220 ohm today
<tty0_> fchmmr: I flash with 20MHz. But had to do a lot of stuff to make it work:
<n1cky> stefanct: got a picture?
<tty0_> I made "coax" with 0.1 mm core  and aluminum foley (from my kitchen), add 100 Ohm resistors (serial)
<tty0_> above the aluminum foley i've put heatshrink
<stefanct> i think that's a bit overkill :)
<tty0_> did this for: CS, CLK, D0, D1
<tty0_> i can flash with 50MHz
* roxfan has quit (Ping timeout: 246 seconds)
<tty0_> I planned to take pics and explain
<fchmmr> sgsit, 50MHz / 0.5MHz = 100 times faster than what we are used to.
<kmalkki> and flashrom does not tell you the correct actual SPI clock
<tty0_> yep
<kmalkki> (for spidev on BBB)
<fchmmr> tty0_, I'm adding these notes to the libreboot documentation.
<tty0_> 512 takes forever (compared with this)
<fchmmr> tty0_, more notes from you (and photos), probably a full guide, would be very useful for a lot of people.
<tty0_> kmalkki: yes
<stefanct< and on the bbb the maximum is in the device tree
<tty0_> stefanct: If you have to do it many times it it worth i believe. I had so much problems flashing my x200t without it
<stefanct< in my case it is 16MHz
<stefanct< tty0_: if it helps... sure
<kmalkki> tty0_: so what hardware did you claim 50MHz with?
<tty0_> BBB

<tty0_> http://i.imgur.com/qHGxKpj.jpg
<tty0_> BTW, i use twisted pair as core (in case i need to put capacitors)
<tty0_> One of my early x200t attempts: http://i.imgur.com/L0fVK3i.jpg

EHCI debugging

Some libreboot systems lack serial ports, so you have to use the debug port (USB) instead. The BeagleBone can be configured for this. It may involve compiling a patched kernel.

Work is in progress to implement this, and document it in libreboot. These are just some preliminary notes.

http://www.coreboot.org/EHCI_Debug_Port http://www.coreboot.org/EHCI_Gadget_Debug 

from #coreboot
<tty0_> stefanct,  1) plug the the BBB to a running system first and make sure you see it as "Netchip" (with lsusb).  if that is correct (i.e you have BBB > ver1 ) , you have to rebuild coreboot/libreboot with Net20DB instead of BBB as debug dongle
<stefanct> tty0_: the coreboot config is clear to me... it fails to show up in lsusb already
<tty0_> on BBB, unload all the modules, then modprobe g_dbgp
<tty0_> ... and when i siad lsusb, you do that on the target system, not on BBB

<tty0_> fchmmr, the kernel should be compiled with: CONFIG_EARLY_PRINTK_DBGP=y to output on EHCI debug: https://wiki.ubuntu.com/Kernel/Debugging/USBearlyprintk

<tty0_> stefanct, carldani: Note that the script has small bug in the last for loop:  for dev in "$debug_dmesg_devs"; do ...
<stefanct> tty0_: had ;)
<stefanct> carldani: ok that's what i was expecting, thanks
* ob-sed has quit (Ping timeout: 248 seconds)
<tty0_> On the wiki there are links to two scripts, the updated one has bug
<tty0_> $debug_dmesg_devs should not be quoted
<tty0_> ... if there are multiple controllers with debug, $dev will be assgined <controller1 controller2> instead of iterating throug each of them
<stefanct> i have seen your conversation with mtjm earlier
<stefanct> that's the reason why i was working on usb debug today at all :)
<stefanct> idwer: ping
<carldani> tty0_: indeed, this was a bug.
<stefanct> carldani: the most annoying thing about lsusb... the debug device is actually missing from lsusb -t as i have found out today
<tty0_> It shows only ports that have something attached to them, because of that you have to go with usb stick through all the ports and run the script each time
<stefanct> tty0_: lsusb without the -t shows the debug device... but doesnt print the port number

Copyright © 2014, 2015 Francis Rowe <info@gluglug.org.uk>
Copyright © 2015 Patrick "P. J." McDermott <pj@pehjota.net>
This document is released under the Creative Commons Attribution-ShareAlike 4.0 International Public License and all future versions. A copy of the license can be found at ../license.txt.

This document is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See ../license.txt for more information.