From d0f4e1ce8c50cdb5303fbd0e4d2e9a7227c3780c Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Tue, 31 May 2016 13:40:29 -0400
Subject: Enable extended states and dynamic L2 cache

This patch sets msr bits to enable dynamic L2 cache
which is a requirement for C4E, which is also enabled
by this patch.
the bit for C2E is also set.
Those msr bits are taken from later cpus and seem to work fine.

C2 state performs particularly bad. Before this patch it consumed ~17-18W.
After this patch it dropped to 14W.

Idle power usage (C4) seems to remain very similar.
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(limited to 'resources/scripts/helpers/build/module/memtest86plus')

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