From 60453ff2cbd1befe24959fba1d24f734406444e3 Mon Sep 17 00:00:00 2001 From: Francis Rowe Date: Fri, 06 Nov 2015 02:45:49 -0500 Subject: Update coreboot to new version (use latest stable kgpe-d16 tree) --- (limited to 'resources/libreboot/patch/kgpe-d16/0093-cpu-amd-family_10h-family_15h-Fix-incorrect-revision.patch') diff --git a/resources/libreboot/patch/kgpe-d16/0093-cpu-amd-family_10h-family_15h-Fix-incorrect-revision.patch b/resources/libreboot/patch/kgpe-d16/0093-cpu-amd-family_10h-family_15h-Fix-incorrect-revision.patch deleted file mode 100644 index b446e30..0000000 --- a/resources/libreboot/patch/kgpe-d16/0093-cpu-amd-family_10h-family_15h-Fix-incorrect-revision.patch +++ /dev/null @@ -1,64 +0,0 @@ -From a50e4e220003702aaa83f8b852aa819975e07788 Mon Sep 17 00:00:00 2001 -From: Timothy Pearson -Date: Sun, 2 Aug 2015 21:31:48 -0500 -Subject: [PATCH 093/139] cpu/amd/family_10h-family_15h: Fix incorrect revision - detection - -Change-Id: I7a881a94d62ed455415f9dfc887fd698ac919429 -Signed-off-by: Timothy Pearson ---- - src/cpu/amd/family_10h-family_15h/fidvid.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c -index 471456a..ed8cafa 100644 ---- a/src/cpu/amd/family_10h-family_15h/fidvid.c -+++ b/src/cpu/amd/family_10h-family_15h/fidvid.c -@@ -375,7 +375,7 @@ static void recalculateVsSlamTimeSettingOnCorePre(device_t dev) - pci_write_config32(dev, 0xd8, dtemp); - } - --static u32 nb_clk_did(int node, u32 cpuRev,u8 procPkg) { -+static u32 nb_clk_did(int node, uint64_t cpuRev, uint8_t procPkg) { - u8 link0isGen3 = 0; - u8 offset; - if (AMD_CpuFindCapability(node, 0, &offset)) { -@@ -446,7 +446,7 @@ static u32 power_up_down(int node, u8 procPkg) { - return dword; - } - --static void config_clk_power_ctrl_reg0(int node, u32 cpuRev, u8 procPkg) { -+static void config_clk_power_ctrl_reg0(int node, uint64_t cpuRev, uint8_t procPkg) { - device_t dev = NODE_PCI(node, 3); - - /* Program fields in Clock Power/Control register0 (F3xD4) */ -@@ -471,7 +471,7 @@ static void config_clk_power_ctrl_reg0(int node, u32 cpuRev, u8 procPkg) { - - } - --static void config_power_ctrl_misc_reg(device_t dev,u32 cpuRev, u8 procPkg) { -+static void config_power_ctrl_misc_reg(device_t dev, uint64_t cpuRev, uint8_t procPkg) { - /* check PVI/SVI */ - u32 dword = pci_read_config32(dev, 0xa0); - -@@ -504,7 +504,7 @@ static void config_power_ctrl_misc_reg(device_t dev,u32 cpuRev, u8 procPkg) { - pci_write_config32(dev, 0xa0, dword); - } - --static void config_nb_syn_ptr_adj(device_t dev, u32 cpuRev) { -+static void config_nb_syn_ptr_adj(device_t dev, uint64_t cpuRev) { - /* Note the following settings are additional from the ported - * function setFidVidRegs() - */ -@@ -526,7 +526,7 @@ static void config_nb_syn_ptr_adj(device_t dev, u32 cpuRev) { - pci_write_config32(dev, 0xdc, dword); - } - --static void config_acpi_pwr_state_ctrl_regs(device_t dev, u32 cpuRev, u8 procPkg) { -+static void config_acpi_pwr_state_ctrl_regs(device_t dev, uint64_t cpuRev, uint8_t procPkg) { - if (is_fam15h()) { - /* Family 15h BKDG Rev. 3.14 D18F3x80 recommended settings */ - pci_write_config32(dev, 0x80, 0xe20be281); --- -1.9.1 - -- cgit v0.9.1