From 5999dba5f71f1c05040a551d2420ab8c7f3a9da4 Mon Sep 17 00:00:00 2001
From: Francis Rowe <info@gluglug.org.uk>
Date: Sat, 17 Oct 2015 11:10:53 -0400
Subject: New board: ASUS KGPE-D16

coreboot build errors:

In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0:
src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration
 static inline enum cb_err get_option(void *dest, const char *name)
                           ^
In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0:
src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here
 enum cb_err get_option(void *dest, const char *name);

Ping tpearson about this.

Also ping him about the fact that there isn't actually an option to
enable or disable native graphics initialization, but that the option
MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the
Kconfig file. I think this is probably since there isn't even an option
ROM available for the machine, so it's pointless to offer the setting.
---
(limited to 'resources/libreboot/patch/kgpe-d16/0058-northbridge-amd-amdmct-Fix-hang-on-boot-due-to-inval.patch')

diff --git a/resources/libreboot/patch/kgpe-d16/0058-northbridge-amd-amdmct-Fix-hang-on-boot-due-to-inval.patch b/resources/libreboot/patch/kgpe-d16/0058-northbridge-amd-amdmct-Fix-hang-on-boot-due-to-inval.patch
new file mode 100644
index 0000000..3dfd6e1
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0058-northbridge-amd-amdmct-Fix-hang-on-boot-due-to-inval.patch
@@ -0,0 +1,35 @@
+From 89a7158d49583b376c9ba34d8b180d8a99f6aa84 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
+Date: Fri, 12 Jun 2015 19:43:06 -0500
+Subject: [PATCH 058/146] northbridge/amd/amdmct: Fix hang on boot due to
+ invalid array access
+
+---
+ src/northbridge/amd/amdmct/wrappers/mcti_d.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+index 1a4e984..d1da07b 100644
+--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
++++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+@@ -344,7 +344,7 @@ static void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat)
+ 	}
+ 
+ #if (CONFIG_DIMM_SUPPORT & 0x000F)==0x0005 /* AMD_FAM10_DDR3 */
+-	for (i = 0; i < 15; i = i + 2) {
++	for (i = 0; i < MAX_DIMMS_SUPPORTED; i = i + 2) {
+ 		if (pDCTstat->DIMMValid & (1 << i))
+ 			ch1_voltage |= pDCTstat->DimmConfiguredVoltage[i];
+ 		if (pDCTstat->DIMMValid & (1 << (i + 1)))
+@@ -355,7 +355,7 @@ static void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat)
+ 	for (i = 0; i < 2; i++) {
+ 		sDCTStruct *pDCTData = pDCTstat->C_DCTPtr[i];
+ 		highest_rank_count[i] = 0x0;
+-		for (dimm = 0; dimm < 8; dimm++) {
++		for (dimm = 0; dimm < MAX_DIMMS_SUPPORTED; dimm++) {
+ 			if (pDCTData->DimmRanks[dimm] > highest_rank_count[i])
+ 				highest_rank_count[i] = pDCTData->DimmRanks[dimm];
+ 		}
+-- 
+1.7.9.5
+
--
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