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* Revert "Revert "Revert "iunfinished patch: copy coreboot per revision, not ↵Francis Rowe2016-03-031-11/+107
| | | | | | | | | board""" When you have to revert a revert of a revert in the same 20 minute window then you my friend are an idiot. And that's exactly what I am. This reverts commit d105b4a8b74645d5936cf8a51b1517f3ba89fd26.
* Revert "Revert "iunfinished patch: copy coreboot per revision, not board""Francis Rowe2016-03-031-107/+11
| | | | This reverts commit 2f3d87aec85f5759180380cbc156472378164d11.
* Revert "iunfinished patch: copy coreboot per revision, not board"Francis Rowe2016-03-031-11/+107
| | | | | | | I'm an idiot. This patch wasn't supposed to be pushed yet because not finished. Reverting it for the time being. This reverts commit 89cc8c38c1cf3865c3684e5bd6658eedf0e61cfd.
* iunfinished patch: copy coreboot per revision, not boardFrancis Rowe2016-02-291-107/+11
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* use only 1 crossgcc revision in librebootFrancis Rowe2016-02-271-38/+18
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* download/coreboot: reset to common revisionFrancis Rowe2016-02-271-0/+5
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* typofixFrancis Rowe2016-02-201-1/+1
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* Update to latest GRUBFrancis Rowe2016-02-201-5/+1
| | | | secfix directory removed (patches merged upstream)
* download/coreboot: use HTTPS (works reliably now, but didn't before)Francis Rowe2016-01-191-1/+1
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* download/coreboot: fix unsafe rm -RfFrancis Rowe2016-01-051-1/+1
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* Use different coreboot revisions and patches per boardFrancis Rowe2016-01-041-99/+183
| | | | | | | | | | | | | | | | | | The release archives will be bigger, but this is a necessary change that makes libreboot development easier. At present, there are boards maintained in libreboot by different people. By doing it this way, that becomes much easier. This is in contrast to the present situation, where a change to one board potentially affects all other boards, especially when updating to a new version of coreboot. Coreboot-libre scripts, download scripts, build scripts - everything. The entire build system has been modified to reflect this change of development. For reasons of consistency, cbfstool and nvramtool are no longer included in the util archives.
* download/coreboot: note about new patch in upstream (2)Francis Rowe2015-12-311-0/+2
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* download/coreboot: note about new patch in upstreamFrancis Rowe2015-12-311-0/+2
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* download/flashrom: fix typo: it's git, not subversionFrancis Rowe2015-12-221-1/+1
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* GRUB: fix security issue with password auth (integer underflow)Francis Rowe2015-12-151-0/+4
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* remove seabios (this time permanently)Francis Rowe2015-12-131-59/+0
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* update SeaBIOSFrancis Rowe2015-12-061-1/+1
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* GRUB: use sane file names for reproducibility patchesFrancis Rowe2015-12-061-3/+3
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* GRUB: really make it reproducibleFrancis Rowe2015-12-061-3/+3
| | | | | Use older version of Alexander's patches, for now. Wait until the final versions are merged upstream in GRUB.
* Revert "Revert "grub: build reproducibly""Francis Rowe2015-12-061-0/+5
| | | | This reverts commit 6278d578f6f47ae2d2742b95c99df087a06d0e90.
* Revert "grub: build reproducibly"Francis Rowe2015-12-041-5/+0
| | | | This reverts commit 26d16fa5cdc9e351fcb582104cf8c7b3bf9ddaf0.
* grub: build reproduciblyFrancis Rowe2015-12-041-0/+5
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* update GRUBFrancis Rowe2015-11-301-3/+3
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* download/Memtest86+: Use patches not raw filesKlemens Nanni2015-11-211-15/+6
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* Replace Chromebook mentions with CrOS, that is more genericPaul Kocialkowski2015-11-061-2/+2
| | | | | | | | | | Not all CrOS devices are Chromebooks (laptops) or run on ARM, not all RK3288 CrOS devices are Chromebooks, either. We want to support more CrOS devices, including some that are not Chromebooks, such as the ASUS Chromebit! Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* veyron_speedy config update, depthcharge menus improvementPaul Kocialkowski2015-11-061-3/+2
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* download/coreboot: add missing copyright attributionFrancis Rowe2015-11-061-0/+1
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* download/coreboot: remove false informationFrancis Rowe2015-11-061-1/+1
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* Update coreboot to new version (use latest stable kgpe-d16 tree)Francis Rowe2015-11-061-1/+1
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* download/coreboot: temporary fix: revert vboot (for ASUS C201)Francis Rowe2015-11-061-1/+1
| | | | Temporary fix for build error.
* KGPE-D16: update patch set (also update coreboot and vboot)Francis Rowe2015-10-181-72/+23
| | | | | | | | | | | Also contains other fixes from coreboot, like: * 551cff0 Derive lvds_dual_channel from EDID timings. ^ makes single/dual channel LVDS selection on GM45 automatic * 26fc544 lenovo/t60: Enable native intel gfx init. ^ was being maintained in libreboot, now upstreamed so not needed Framebuffer mode was disabled for the KGPE-D16, because only text-mode works at the moment.
* New board: ASUS KGPE-D16Francis Rowe2015-10-171-0/+6
| | | | | | | | | | | | | | | | | | | | coreboot build errors: In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0: src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration static inline enum cb_err get_option(void *dest, const char *name) ^ In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0: src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here enum cb_err get_option(void *dest, const char *name); Ping tpearson about this. Also ping him about the fact that there isn't actually an option to enable or disable native graphics initialization, but that the option MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the Kconfig file. I think this is probably since there isn't even an option ROM available for the machine, so it's pointless to offer the setting.
* download/seabios: say SeaBIOS, not GRUBFrancis Rowe2015-10-141-3/+3
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* Update SeaBIOS to 6bcacf7d19b1dc7fcd99f55491e93514f1f19279Francis Rowe2015-10-141-1/+1
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* Integrate SeaBIOS payload as option on top of GRUB, with SeaVGABIOSFrancis Rowe2015-10-141-0/+59
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* download/coreboot: add note about patchFrancis Rowe2015-10-141-0/+3
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* download/coreboot: note about patch that was merged upstreamFrancis Rowe2015-10-111-0/+1
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* download/coreboot: comment the git reset instruction for vbootFrancis Rowe2015-10-111-0/+1
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* Chromebook C201 (codename veyron_speedy) supportPaul Kocialkowski2015-10-112-0/+114
| | | | | | | | | | | | | | | | | This introduces Libreboot support for the Asus Chromebook C201 (codename veyron_speedy). At this point, this produces a standalone Libreboot image that can be flashed to the RO Coreboot partition of the SPI flash, as well as the Libreboot version that can be flash to the RO Firmware ID partition. Libreboot on the Chromebook C201 uses the depthcharge bootloader, modified to display text messages instead of ChromeOS bitmaps (that encourage the use of ChromeOS). For convenience, an installation script, chromebook-flash-replace, is provided along with a description of the flash layout, to ease the replacement of the Coreboot and RO Firmware ID partitions on the full SPI flash image. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* download/coreboot: add coreboot version infoFrancis Rowe2015-10-101-0/+9
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* Update coreboot-libre based on coreboot a2bed346aFrancis Rowe2015-10-101-5/+8
| | | | | | | | | | | | | | | More microcode blobs were deleted upstream, which are therefore no longer deleted by coreboot-libre. util/broadcom/secimage/misc.c is not a blob. Some non-blobs were deleted upstream, which are therefore no longer listed in libreboot's nonblobs list. New non-blobs were found, added to the nonblobs list. vboot submodule was added, since there are parts of it that cbfstool needs. This submodule is now deblobbed by libreboot.
* GRUB2: Cryptomount enhancements: HotfixKlemens Nanni2015-10-071-0/+2
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* GRUB2: Cryptomount enhancements, grub.johnlane.ieKlemens Nanni2015-10-071-0/+7
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* Update GRUBFrancis Rowe2015-10-071-2/+3
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* New board: ThinkPad R500 (experimental)Francis Rowe2015-09-201-0/+1
| | | | | | | | | | | | | | | | | | The ich9deblob and ich9gen utilities were modified, so that they support reading and/or writing descriptor images where the GbE region is not defined. These utilities were also re-factored and tidied up a bit. A quick was noticed during the course of this work, in that Compenent 1 Density was being set to 8MiB constantly, even on systems with 4MiB flash chips. Component 2 Density was set statically to 2MiB. ich9gen now sets both to 4MiB or 8MiB, depending on whether building the descriptor for a 4MiB or 8MiB ROM image. There are still some ACPI bugs (see docs/hcl/r500.html), which will have to be fixed upstream. TODO: get hw reg dumps from a factory R500, and compare with the X200 or T400 dumps.
* all scripts: general fixes and clean upFrancis Rowe2015-08-295-15/+0
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* download/grub: remove dead codeFrancis Rowe2015-08-291-7/+0
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* download/flashrom: screw svn use stefanct's unofficial git repoFrancis Rowe2015-08-291-1/+4
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* downloads: don't check sha512 on git/svm downloadsFrancis Rowe2015-08-294-26/+0
| | | | | Resetting to those commits already implies that they are correct, because git already does integrity checking.
* really make memtest86plus naming consistentFrancis Rowe2015-08-291-2/+2
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