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-rw-r--r--resources/libreboot/patch/kgpe-d16/0134-cpu-amd-model_10xxx-Apply-missing-Family-15h-errata-.patch68
1 files changed, 68 insertions, 0 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0134-cpu-amd-model_10xxx-Apply-missing-Family-15h-errata-.patch b/resources/libreboot/patch/kgpe-d16/0134-cpu-amd-model_10xxx-Apply-missing-Family-15h-errata-.patch
new file mode 100644
index 0000000..5f3d325
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0134-cpu-amd-model_10xxx-Apply-missing-Family-15h-errata-.patch
@@ -0,0 +1,68 @@
+From ac7cef89f29757df10f660a960c16e818d28de03 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
+Date: Thu, 3 Sep 2015 17:43:52 -0500
+Subject: [PATCH 134/146] cpu/amd/model_10xxx: Apply missing Family 15h errata
+ fixes
+
+---
+ src/cpu/amd/model_10xxx/defaults.h | 12 ++++++++++++
+ src/northbridge/amd/amdfam10/misc_control.c | 6 ++++++
+ 2 files changed, 18 insertions(+)
+
+diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h
+index af59120..7a84fcb 100644
+--- a/src/cpu/amd/model_10xxx/defaults.h
++++ b/src/cpu/amd/model_10xxx/defaults.h
+@@ -166,6 +166,14 @@ static const struct {
+ 0x0000000C, 0x00000000,
+ 0x0000000C, 0x00000000}, /* Cx and Dx multiple-link processor */
+
++ { OSVW_ID_Length, AMD_FAM15_ALL, AMD_PTYPE_ALL,
++ 0x00000005, 0x00000000,
++ 0x00000005, 0x00000000}, /* OSVW_ID_Length = 0x5 */
++
++ { OSVW_Status, AMD_FAM15_ALL, AMD_PTYPE_ALL,
++ 0x00000010, 0x00000000,
++ 0x00000010, 0x00000000}, /* OsvwId4 = 0x1 */
++
+ { BU_CFG2, AMD_DR_Dx, AMD_PTYPE_ALL,
+ 0x00000000, 1 << (50-32),
+ 0x00000000, 1 << (50-32)}, /* D0 or Above, RdMmExtCfgQwEn*/
+@@ -638,6 +646,10 @@ static const struct {
+ { 3, 0x1b8, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL,
+ 0x00001000, 0x00001000 }, /* [12] = L3PrivReplEn */
+
++ /* Errata 504 workaround */
++ { 3, 0x1b8, AMD_FAM15_ALL, AMD_PTYPE_ALL,
++ 0x00040000, 0x00040000 }, /* [18] = 1b */
++
+ /* IBS Control Register */
+ { 3, 0x1cc, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL,
+ 0x00000100, 0x00000100 }, /* [8] = LvtOffsetVal */
+diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c
+index 61cf1b6..fcb28c4 100644
+--- a/src/northbridge/amd/amdfam10/misc_control.c
++++ b/src/northbridge/amd/amdfam10/misc_control.c
+@@ -80,6 +80,7 @@ static void mcf3_read_resources(device_t dev)
+
+ static void set_agp_aperture(device_t dev, uint32_t pci_id)
+ {
++ uint32_t dword;
+ struct resource *resource;
+
+ resource = probe_resource(dev, 0x94);
+@@ -110,6 +111,11 @@ static void set_agp_aperture(device_t dev, uint32_t pci_id)
+
+ /* Report the resource has been stored... */
+ report_resource_stored(pdev, resource, " <gart>");
++
++ /* Errata 540 workaround */
++ dword = pci_read_config32(pdev, 0x90);
++ dword |= 0x1 << 6; /* DisGartTblWlkPrb = 0x1 */
++ pci_write_config32(pdev, 0x90, dword);
+ }
+ }
+ }
+--
+1.7.9.5
+