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| author | Francis Rowe <info@gluglug.org.uk> | 2015-07-18 19:31:16 (EDT) |
|---|---|---|
| committer | Francis Rowe <info@gluglug.org.uk> | 2015-09-20 04:06:27 (EDT) |
| commit | d1bb5d6fcc75f07ca6a58b5536906980aff9d253 (patch) | |
| tree | 7821900fe16ece180a021957371a7c0b798922dd /resources/utilities/coreboot-libre | |
| parent | 919af0e6b7cbff2171d370a0b830f2b9d740410b (diff) | |
| download | libreboot-d1bb5d6fcc75f07ca6a58b5536906980aff9d253.zip libreboot-d1bb5d6fcc75f07ca6a58b5536906980aff9d253.tar.gz libreboot-d1bb5d6fcc75f07ca6a58b5536906980aff9d253.tar.bz2 | |
New board: ThinkPad R500 (experimental)
The ich9deblob and ich9gen utilities were modified, so that they
support reading and/or writing descriptor images where the GbE
region is not defined. These utilities were also re-factored
and tidied up a bit.
A quick was noticed during the course of this work, in that
Compenent 1 Density was being set to 8MiB constantly, even
on systems with 4MiB flash chips. Component 2 Density was
set statically to 2MiB. ich9gen now sets both to 4MiB or 8MiB,
depending on whether building the descriptor for a 4MiB or
8MiB ROM image.
There are still some ACPI bugs (see docs/hcl/r500.html), which
will have to be fixed upstream. TODO: get hw reg dumps from
a factory R500, and compare with the X200 or T400 dumps.
Diffstat (limited to 'resources/utilities/coreboot-libre')
| -rwxr-xr-x | resources/utilities/coreboot-libre/deblob | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/resources/utilities/coreboot-libre/deblob b/resources/utilities/coreboot-libre/deblob index 65611b3..bc488bd 100755 --- a/resources/utilities/coreboot-libre/deblob +++ b/resources/utilities/coreboot-libre/deblob @@ -156,6 +156,9 @@ rm -f \ # Purpose unknown. TODO: investigate # ---------------------------------- +# <Stepan> francis7: util/broadcom/secimage/misc.c is a precalculated crc32 polynome table +# <Stepan> It's just a standard crc32 implementation + rm -f \ "util/broadcom/secimage/misc.c" |