New board: ASUS KGPE-D16

coreboot build errors:

In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0:
src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration
 static inline enum cb_err get_option(void *dest, const char *name)
                           ^
In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0:
src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here
 enum cb_err get_option(void *dest, const char *name);

Ping tpearson about this.

Also ping him about the fact that there isn't actually an option to
enable or disable native graphics initialization, but that the option
MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the
Kconfig file. I think this is probably since there isn't even an option
ROM available for the machine, so it's pointless to offer the setting.

1 files changed, 151 insertions, 0 deletions

diff --git a/resources/libreboot/patch/kgpe-d16/0132-cpu-amd-microcode-Introduce-CBFS-access-spinlock-to-.patch b/resources/libreboot/patch/kgpe-d16/0132-cpu-amd-microcode-Introduce-CBFS-access-spinlock-to-.patch
new file mode 100644
index 0000000..a8005e8
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0132-cpu-amd-microcode-Introduce-CBFS-access-spinlock-to-.patch
@@ -0,0 +1,151 @@
+From 2b8c4a3914e4d0705f10f09ea570e6f8a9d7ef93 Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
+Date: Fri, 28 Aug 2015 20:48:17 -0500
+Subject: [PATCH 132/146] cpu/amd/microcode: Introduce CBFS access spinlock to
+ avoid IOMMU failure
+
+---
+ src/Kconfig                              |    4 ++++
+ src/arch/x86/include/arch/smp/spinlock.h |    7 ++++++-
+ src/cpu/amd/microcode/microcode.c        |   23 +++++++++++++++++++++++
+ src/mainboard/asus/kgpe-d16/Kconfig      |    1 +
+ src/mainboard/asus/kgpe-d16/romstage.c   |   15 ++++++++++++++-
+ 5 files changed, 48 insertions(+), 2 deletions(-)
+
+diff --git a/src/Kconfig b/src/Kconfig
+index f1b7ebe..6b0df6a 100644
+--- a/src/Kconfig
++++ b/src/Kconfig
+@@ -455,6 +455,10 @@ config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
+ 	bool
+ 	default n
+ 
++config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK
++	bool
++	default n
++
+ config HAVE_MONOTONIC_TIMER
+ 	def_bool n
+ 	help
+diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h
+index cf142a9..291c943 100644
+--- a/src/arch/x86/include/arch/smp/spinlock.h
++++ b/src/arch/x86/include/arch/smp/spinlock.h
+@@ -1,7 +1,10 @@
+ #ifndef ARCH_SMP_SPINLOCK_H
+ #define ARCH_SMP_SPINLOCK_H
+ 
+-#if !defined(__PRE_RAM__) || defined(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) || defined(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK)
++#if !defined(__PRE_RAM__) \
++	|| defined(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK)	\
++	|| defined(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK)	\
++	|| defined(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK)
+ 
+ /*
+  * Your basic SMP spinlocks, allowing only a single CPU anywhere
+@@ -16,6 +19,8 @@ spinlock_t* romstage_console_lock(void);
+ void initialize_romstage_console_lock(void);
+ spinlock_t* romstage_nvram_cbfs_lock(void);
+ void initialize_romstage_nvram_cbfs_lock(void);
++spinlock_t* romstage_microcode_cbfs_lock(void);
++void initialize_romstage_microcode_cbfs_lock(void);
+ #endif
+ 
+ #define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 }
+diff --git a/src/cpu/amd/microcode/microcode.c b/src/cpu/amd/microcode/microcode.c
+index ce5b08f..fc6b0f2 100644
+--- a/src/cpu/amd/microcode/microcode.c
++++ b/src/cpu/amd/microcode/microcode.c
+@@ -24,6 +24,12 @@
+ #include <cpu/amd/microcode.h>
+ #include <cbfs.h>
+ 
++#ifdef __PRE_RAM__
++#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK)
++#include <smp/spinlock.h>
++#endif
++#endif
++
+ #define UCODE_DEBUG(fmt, args...)	\
+ 	do { printk(BIOS_DEBUG, "[microcode] "fmt, ##args); } while(0)
+ 
+@@ -106,12 +112,29 @@ void amd_update_microcode_from_cbfs(u32 equivalent_processor_rev_id)
+ 		return;
+ 	}
+ 
++#ifdef __PRE_RAM__
++#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK)
++	spin_lock(romstage_microcode_cbfs_lock());
++#endif
++#endif
++
+ 	ucode = cbfs_boot_map_with_leak(MICROCODE_CBFS_FILE,
+ 					CBFS_TYPE_MICROCODE, &ucode_len);
+ 	if (!ucode) {
+ 		UCODE_DEBUG("microcode file not found. Skipping updates.\n");
++#ifdef __PRE_RAM__
++#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK)
++		spin_unlock(romstage_microcode_cbfs_lock());
++#endif
++#endif
+ 		return;
+ 	}
+ 
+ 	amd_update_microcode(ucode, ucode_len, equivalent_processor_rev_id);
++
++#ifdef __PRE_RAM__
++#if IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK)
++	spin_unlock(romstage_microcode_cbfs_lock());
++#endif
++#endif
+ }
+diff --git a/src/mainboard/asus/kgpe-d16/Kconfig b/src/mainboard/asus/kgpe-d16/Kconfig
+index 06116a2..5f421db 100644
+--- a/src/mainboard/asus/kgpe-d16/Kconfig
++++ b/src/mainboard/asus/kgpe-d16/Kconfig
+@@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
+ 	select PARALLEL_CPU_INIT
+ 	select HAVE_ROMSTAGE_CONSOLE_SPINLOCK
+ 	select HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
++	select HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK
+ 	select HAVE_HARD_RESET
+ 	select HAVE_OPTION_TABLE
+ 	select HAVE_CMOS_DEFAULT
+diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
+index 3740bb0..6b5d801 100644
+--- a/src/mainboard/asus/kgpe-d16/romstage.c
++++ b/src/mainboard/asus/kgpe-d16/romstage.c
+@@ -327,6 +327,18 @@ void initialize_romstage_nvram_cbfs_lock(void)
+ 	car_get_var(nvram_cbfs_spinlock) = SPIN_LOCK_UNLOCKED;
+ }
+ 
++static spinlock_t microcode_cbfs_spinlock CAR_GLOBAL;
++
++spinlock_t* romstage_microcode_cbfs_lock(void)
++{
++	return car_get_var_ptr(&microcode_cbfs_spinlock);
++}
++
++void initialize_romstage_microcode_cbfs_lock(void)
++{
++	car_get_var(microcode_cbfs_spinlock) = SPIN_LOCK_UNLOCKED;
++}
++
+ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
+ {
+ 	uint32_t esp;
+@@ -348,9 +360,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
+ 		timestamp_init(timestamp_get());
+ 		timestamp_add_now(TS_START_ROMSTAGE);
+ 
+-		/* Initialize the printk and nvram CBFS spinlocks */
++		/* Initialize the printk, nvram CBFS, and microcode CBFS spinlocks */
+ 		initialize_romstage_console_lock();
+ 		initialize_romstage_nvram_cbfs_lock();
++		initialize_romstage_microcode_cbfs_lock();
+ 
+ 		/* Nothing special needs to be done to find bus 0 */
+ 		/* Allow the HT devices to be found */
+-- 
+1.7.9.5
+