New board: ASUS KGPE-D16

coreboot build errors:

In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0:
src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration
 static inline enum cb_err get_option(void *dest, const char *name)
                           ^
In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0:
src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here
 enum cb_err get_option(void *dest, const char *name);

Ping tpearson about this.

Also ping him about the fact that there isn't actually an option to
enable or disable native graphics initialization, but that the option
MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the
Kconfig file. I think this is probably since there isn't even an option
ROM available for the machine, so it's pointless to offer the setting.

1 files changed, 35 insertions, 0 deletions

diff --git a/resources/libreboot/patch/kgpe-d16/0126-northbridge-amd-amdmct-mct_ddr3-Fix-a-minor-RDIMM-CS.patch b/resources/libreboot/patch/kgpe-d16/0126-northbridge-amd-amdmct-mct_ddr3-Fix-a-minor-RDIMM-CS.patch
new file mode 100644
index 0000000..d6788b5
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0126-northbridge-amd-amdmct-mct_ddr3-Fix-a-minor-RDIMM-CS.patch
@@ -0,0 +1,35 @@
+From 85a652d6f36b200437c86b84cc76304271c14a1e Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
+Date: Thu, 27 Aug 2015 13:18:53 -0500
+Subject: [PATCH 126/146] northbridge/amd/amdmct/mct_ddr3: Fix a minor RDIMM
+ CS select error
+
+---
+ src/northbridge/amd/amdmct/mct_ddr3/mctrci.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
+index 624a543..8fd2523 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
+@@ -236,7 +236,7 @@ void mct_DramControlReg_Init_D(struct MCTStatStruc *pMCTstat,
+ 	for (MrsChipSel = 0; MrsChipSel < 8; MrsChipSel ++, MrsChipSel ++) {
+ 		if (pDCTstat->CSPresent & (1 << MrsChipSel)) {
+ 			val = Get_NB32_DCT(dev, dct, 0xa8);
+-			val &= ~(0xf << 8);
++			val &= ~(0xff << 8);
+ 
+ 			switch (MrsChipSel) {
+ 				case 0:
+@@ -283,7 +283,7 @@ void FreqChgCtrlWrd(struct MCTStatStruc *pMCTstat,
+ 			/* 2. Program F2x[1, 0]A8[CtrlWordCS]=bit mask for target chip selects. */
+ 			val = Get_NB32_DCT(dev, dct, 0xa8);
+ 			val &= ~(0xff << 8);
+-			val |= (0x3 << (MrsChipSel & 0xfe)) << 8;
++			val |= (0x3 << (MrsChipSel & ~0x1)) << 8;
+ 			Set_NB32_DCT(dev, dct, 0xa8, val);
+ 
+ 			/* Resend control word 10 */
+-- 
+1.7.9.5
+