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| author | Francis Rowe <info@gluglug.org.uk> | 2015-10-17 11:10:53 (EDT) |
|---|---|---|
| committer | Francis Rowe <info@gluglug.org.uk> | 2015-10-17 14:07:35 (EDT) |
| commit | 5999dba5f71f1c05040a551d2420ab8c7f3a9da4 (patch) | |
| tree | 7313b1996a247bf938417d5cf2496f5f6625c0db /resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch | |
| parent | 4d909153e79661e54999e51693668f6d1ecc1cca (diff) | |
| download | libreboot-5999dba5f71f1c05040a551d2420ab8c7f3a9da4.zip libreboot-5999dba5f71f1c05040a551d2420ab8c7f3a9da4.tar.gz libreboot-5999dba5f71f1c05040a551d2420ab8c7f3a9da4.tar.bz2 | |
New board: ASUS KGPE-D16
coreboot build errors:
In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0:
src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration
static inline enum cb_err get_option(void *dest, const char *name)
^
In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0:
src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here
enum cb_err get_option(void *dest, const char *name);
Ping tpearson about this.
Also ping him about the fact that there isn't actually an option to
enable or disable native graphics initialization, but that the option
MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the
Kconfig file. I think this is probably since there isn't even an option
ROM available for the machine, so it's pointless to offer the setting.
Diffstat (limited to 'resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch')
| -rw-r--r-- | resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch b/resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch new file mode 100644 index 0000000..0dc6ff3 --- /dev/null +++ b/resources/libreboot/patch/kgpe-d16/0118-southbridge-amd-sr5650-Use-correct-PCI-configuration.patch @@ -0,0 +1,28 @@ +From da9855ac660e4b527ca0ee754d792ea0ab361fcc Mon Sep 17 00:00:00 2001 +From: Timothy Pearson <kb9vqf@pearsoncomputing.net> +Date: Fri, 14 Aug 2015 02:50:44 -0500 +Subject: [PATCH 118/146] southbridge/amd/sr5650: Use correct PCI + configuration block offset + +--- + src/southbridge/amd/sr5650/acpi/sr5650.asl | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/src/southbridge/amd/sr5650/acpi/sr5650.asl b/src/southbridge/amd/sr5650/acpi/sr5650.asl +index a6ab114..1e0d5b0 100644 +--- a/src/southbridge/amd/sr5650/acpi/sr5650.asl ++++ b/src/southbridge/amd/sr5650/acpi/sr5650.asl +@@ -19,8 +19,8 @@ + */ + + Scope(\) { +- Name(PCBA, 0xE0000000) /* Base address of PCIe config space */ +- Name(HPBA, 0xFED00000) /* Base address of HPET table */ ++ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ ++ Name(HPBA, 0xFED00000) /* Base address of HPET table */ + + /* PIC IRQ mapping registers, C00h-C01h */ + OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002) +-- +1.7.9.5 + |