New board: ASUS KGPE-D16

coreboot build errors:

In file included from src/northbridge/amd/amdfam10/misc_control.c:35:0:
src/include/option.h:13:27: error: static declaration of 'get_option' follows non-static declaration
 static inline enum cb_err get_option(void *dest, const char *name)
                           ^
In file included from src/northbridge/amd/amdfam10/misc_control.c:34:0:
src/include/pc80/mc146818rtc.h:176:13: note: previous declaration of 'get_option' was here
 enum cb_err get_option(void *dest, const char *name);

Ping tpearson about this.

Also ping him about the fact that there isn't actually an option to
enable or disable native graphics initialization, but that the option
MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG is in fact available and set to Y in the
Kconfig file. I think this is probably since there isn't even an option
ROM available for the machine, so it's pointless to offer the setting.

1 files changed, 94 insertions, 0 deletions

diff --git a/resources/libreboot/patch/kgpe-d16/0116-northbridge-amd-amdfam10-Fix-gart-setup-not-working-.patch b/resources/libreboot/patch/kgpe-d16/0116-northbridge-amd-amdfam10-Fix-gart-setup-not-working-.patch
new file mode 100644
index 0000000..3427889
--- /dev/null
+++ b/resources/libreboot/patch/kgpe-d16/0116-northbridge-amd-amdfam10-Fix-gart-setup-not-working-.patch
@@ -0,0 +1,94 @@
+From e63ed74fba45c969ebad74153c4644bcfb6229da Mon Sep 17 00:00:00 2001
+From: Timothy Pearson <kb9vqf@pearsoncomputing.net>
+Date: Tue, 11 Aug 2015 17:52:31 -0500
+Subject: [PATCH 116/146] northbridge/amd/amdfam10: Fix gart setup not working
+ on Family 15h processors
+
+---
+ src/northbridge/amd/amdfam10/misc_control.c |   34 ++++++++++++++++++++-------
+ 1 file changed, 26 insertions(+), 8 deletions(-)
+
+diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c
+index 4710876..61cf1b6 100644
+--- a/src/northbridge/amd/amdfam10/misc_control.c
++++ b/src/northbridge/amd/amdfam10/misc_control.c
+@@ -78,7 +78,7 @@ static void mcf3_read_resources(device_t dev)
+ 	}
+ }
+ 
+-static void set_agp_aperture(device_t dev)
++static void set_agp_aperture(device_t dev, uint32_t pci_id)
+ {
+ 	struct resource *resource;
+ 
+@@ -98,7 +98,7 @@ static void set_agp_aperture(device_t dev)
+ 
+ 		/* Update the other northbriges */
+ 		pdev = 0;
+-		while((pdev = dev_find_device(PCI_VENDOR_ID_AMD, 0x1203, pdev))) {
++		while ((pdev = dev_find_device(PCI_VENDOR_ID_AMD, pci_id, pdev))) {
+ 			/* Store the GART size but don't enable it */
+ 			pci_write_config32(pdev, 0x90, gart_acr);
+ 
+@@ -114,10 +114,19 @@ static void set_agp_aperture(device_t dev)
+ 	}
+ }
+ 
+-static void mcf3_set_resources(device_t dev)
++static void mcf3_set_resources_fam10h(device_t dev)
+ {
+ 	/* Set the gart apeture */
+-	set_agp_aperture(dev);
++	set_agp_aperture(dev, 0x1203);
++
++	/* Set the generic PCI resources */
++	pci_dev_set_resources(dev);
++}
++
++static void mcf3_set_resources_fam15h(device_t dev)
++{
++	/* Set the gart apeture */
++	set_agp_aperture(dev, 0x1603);
+ 
+ 	/* Set the generic PCI resources */
+ 	pci_dev_set_resources(dev);
+@@ -156,9 +165,18 @@ static void misc_control_init(struct device *dev)
+ }
+ 
+ 
+-static struct device_operations mcf3_ops  = {
++static struct device_operations mcf3_ops_fam10h  = {
++	.read_resources   = mcf3_read_resources,
++	.set_resources    = mcf3_set_resources_fam10h,
++	.enable_resources = pci_dev_enable_resources,
++	.init             = misc_control_init,
++	.scan_bus         = 0,
++	.ops_pci          = 0,
++};
++
++static struct device_operations mcf3_ops_fam15h  = {
+ 	.read_resources   = mcf3_read_resources,
+-	.set_resources    = mcf3_set_resources,
++	.set_resources    = mcf3_set_resources_fam15h,
+ 	.enable_resources = pci_dev_enable_resources,
+ 	.init             = misc_control_init,
+ 	.scan_bus         = 0,
+@@ -166,13 +184,13 @@ static struct device_operations mcf3_ops  = {
+ };
+ 
+ static const struct pci_driver mcf3_driver __pci_driver = {
+-	.ops    = &mcf3_ops,
++	.ops    = &mcf3_ops_fam10h,
+ 	.vendor = PCI_VENDOR_ID_AMD,
+ 	.device = 0x1203,
+ };
+ 
+ static const struct pci_driver mcf3_driver_fam15 __pci_driver = {
+-	.ops    = &mcf3_ops,
++	.ops    = &mcf3_ops_fam15h,
+ 	.vendor = PCI_VENDOR_ID_AMD,
+ 	.device = 0x1603,
+ };
+-- 
+1.7.9.5
+